     8  4   (            
                               2    google,kodama-sku16 google,kodama mediatek,mt8183                                    +            7MediaTek kodama sku16 board    aliases          =/soc/i2c@11007000            B/soc/i2c@11011000            G/soc/i2c@11009000            L/soc/i2c@1100f000            Q/soc/i2c@11008000            V/soc/i2c@11016000            [/soc/i2c@11005000            `/soc/i2c@1101a000            e/soc/i2c@1101b000            j/soc/i2c@11014000            o/soc/i2c@11015000            u/soc/i2c@11017000            {/soc/ovl@14008000            /soc/ovl@14009000            /soc/ovl@1400a000            /soc/rdma@1400b000           /soc/rdma@1400c000           /soc/serial@11002000             /soc/mmc@11230000            /soc/mmc@11240000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3               	            cpu@0            cpu           arm,cortex-a53                        psci                           
               T                              (         cpu@1            cpu           arm,cortex-a53                       psci                           
               T                              (         cpu@2            cpu           arm,cortex-a53                       psci                           
               T                              (         cpu@3            cpu           arm,cortex-a53                       psci                           
               T                              (         cpu@100          cpu           arm,cortex-a73                       psci                            
                                             (         cpu@101          cpu           arm,cortex-a73                      psci                            
                                             (         cpu@102          cpu           arm,cortex-a73                      psci                            
                                             (         cpu@103          cpu           arm,cortex-a73                      psci                            
                                             (   	      idle-states         0psci       cpu-sleep             arm,idle-state           =        N          e           v                      (   
      cluster-sleep-0           arm,idle-state           =        N         e           v                    (         cluster-sleep-1           arm,idle-state           =        N         e           v                    (               opp_table0            operating-points-v2                  (   R   opp-300000000                         	h P      opp-320000000                         	 P      opp-340000000               C          	< P      opp-360000000               u*          	Ҧ P      opp-380000000               W          	 P      opp-400000000               ׄ          
z P      opp-420000000                         
 P      opp-460000000               k          
L P      opp-500000000               e          
} P      opp-540000000                /          
` P      opp-580000000               "          
4 P      opp-620000000               $s           P      opp-653000000               &@         YF P      opp-698000000               )          A      opp-743000000               ,IG          6      opp-800000000               /           H         pmu-a53           arm,cortex-a53-pmu                                        pmu-a73           arm,cortex-a73-pmu                                        psci              arm,psci-1.0             smc       fixed-factor-clock-13m            fixed-factor-clock                                                       clk13m          (         oscillator            fixed-clock                             clk26m          (         timer             arm,armv8-timer                   @                                               
             soc                      +             simple-bus              soc_data@8000000          %    mediatek,mt8183-efuse mediatek,efuse                                                +           okay          interrupt-controller@c000000              arm,gic-v3                                  -      P                                   @              A             B                        	                B        (      ppi-partitions     interrupt-partition-0           b                    (         interrupt-partition-1           b            	        (               syscon@c530000            mediatek,mt8183-mcucfg syscon                S                          interrupt-controller@c530a80          .    mediatek,mt8183-sysirq mediatek,mt6577-sysirq            -                                    S
       P        (         syscon@10000000            mediatek,mt8183-topckgen syscon                                           (         syscon@10001000            mediatek,mt8183-infracfg syscon                                          k           (         syscon@10003000           mediatek,mt8183-pericfg syscon                0                           (   E      pinctrl@10005000              mediatek,mt8183-pinctrl               P                                                                                                                                   D  xiocfg0 iocfg1 iocfg2 iocfg3 iocfg4 iocfg5 iocfg6 iocfg7 iocfg8 eint                                                    -                                    SPI_AP_EC_CS_L SPI_AP_EC_MOSI SPI_AP_EC_CLK I2S3_DO USB_PD_INT_ODL     IT6505_HPD_L I2S3_TDM_D3 SOC_I2C6_1V8_SCL SOC_I2C6_1V8_SDA DPI_D0 DPI_D1 DPI_D2 DPI_D3 DPI_D4 DPI_D5 DPI_D6 DPI_D7 DPI_D8 DPI_D9 DPI_D10 DPI_D11 DPI_HSYNC DPI_VSYNC DPI_DE DPI_CK AP_MSDC1_CLK AP_MSDC1_DAT3 AP_MSDC1_CMD AP_MSDC1_DAT0 AP_MSDC1_DAT2 AP_MSDC1_DAT1       OTG_EN DRVBUS DISP_PWM DSI_TE LCM_RST_1V8 AP_CTS_WIFI_RTS AP_RTS_WIFI_CTS SOC_I2C5_1V8_SCL SOC_I2C5_1V8_SDA SOC_I2C3_1V8_SCL SOC_I2C3_1V8_SDA                              SOC_I2C1_1V8_SDA SOC_I2C0_1V8_SDA SOC_I2C0_1V8_SCL SOC_I2C1_1V8_SCL AP_SPI_H1_MISO AP_SPI_H1_CS_L AP_SPI_H1_MOSI AP_SPI_H1_CLK I2S5_BCK I2S5_LRCK I2S5_DO BOOTBLOCK_EN_L MT8183_KPCOL0 SPI_AP_EC_MISO UART_DBG_TX_AP_RX UART_AP_TX_DBG_RX I2S2_MCK I2S2_BCK CLK_5M_WCAM CLK_2M_UCAM I2S2_LRCK I2S2_DI SOC_I2C2_1V8_SCL SOC_I2C2_1V8_SDA SOC_I2C4_1V8_SCL SOC_I2C4_1V8_SDA  SCL8 SDA8 FCAM_PWDN_L                          I2S_PMIC I2S_PMIC I2S_PMIC I2S_PMIC I2S_PMIC I2S_PMIC I2S_PMIC I2S_PMIC       AP_FLASH_WP_L EC_AP_INT_ODL IT6505_INT_ODL H1_INT_OD_L        AP_SPI_FLASH_MISO AP_SPI_FLASH_CS_L AP_SPI_FLASH_MOSI AP_SPI_FLASH_CLK DA7219_IRQ                                    (      bt-pins         (   *   pins-bt-en            x                   ec-ap-int-odl           (   >   pins1                                         h1-int-od-l         (   4   pins1                                i2c0            (   -   pins-bus              R  S                                i2c1            (   <   pins-bus              Q  T                                i2c2            (   1   pins-bus              g  h                              i2c3            (   :   pins-bus              2  3                                i2c4            (   /   pins-bus              i  j                              i2c5            (   @   pins-bus              0  1                                i2c6            (   ,   pins-bus                                  mmc0-pins-default           (   G   pins-cmd-dat          $    {    }    ~        z                 $                    pins-clk              |        $           3   
      pins-rst                      $           3            mmc0-pins-uhs           (   H   pins-cmd-dat          $    {    }    ~        z                 $                    pins-clk              |        $           3   
      pins-ds                   $           3   
      pins-rst                      $                       mmc1-pins-default           (   K   pins-cmd-dat                   "  !                      
      pins-clk                               3   
         mmc1-pins-uhs           (   L   pins-cmd-dat                   "  !          $                       
      pins-clk                      $           3   
                  panel-pins-default          (   W   panel-reset           -                            pwm0-pin-default            (   9   pins1                       J               pins2             +         scp         (      pins-scp-uart             n  p         spi0            (   3   pins-spi              U  V   W  X                  spi1            (   ;   pins-spi                                      spi2            (   =   pins-spi                                  pins-spi-mi           ^        3             spi3            (   ?   pins-spi                                      spi4            (   A   pins-spi                                      spi5            (   B   pins-spi                                      uart0-pins-default          (   '   pins-rx           _                        pins-tx           `         uart1-pins-default          (   (   pins-rx           y                        pins-tx           s      pins-rts              /         V      pins-cts              .                  uart1-pins-sleep            (   )   pins-rx           y                         pins-tx           s      pins-rts              /         V      pins-cts              .                  wifi-pins-pwrseq            (   f   pins-wifi-enable              w                   wifi-pins-wakeup            (   g   pins-wifi-wakeup              q                   ppvarp-lcd-en           (   i   pins1             B                   ppvarn-lcd-en           (   h   pins1                                pp1800-lcd-en           (   j   pins1             $                   touchdefault            (   .   pin_irq                                    pin_reset                       J            syscon@10006000           syscon simple-mfd                 `                d      power-controller          !    mediatek,mt8183-power-controller                         +            d           (   8   power-domain@0                                   /      7        xaudio audio1 audio2         d          power-domain@1                                 d          power-domain@2                                    xmfg                      +            d      power-domain@3                                   +            d                 power-domain@4                      d          power-domain@5                      d          power-domain@6                                 d                power-domain@7                    X                                                                     	      5  xmm mm-0 mm-1 mm-2 mm-3 mm-4 mm-5 mm-6 mm-7 mm-8 mm-9                                               +            d      power-domain@8                    @                     	                                    .  xcam cam-0 cam-1 cam-2 cam-3 cam-4 cam-5 cam-6                                 d          power-domain@9              	              "      	              xisp isp-0 isp-1                               d          power-domain@10             
                   d          power-domain@11                                d          power-domain@12                   @        &      #                                           -  xvpu vpu1 vpu-0 vpu-1 vpu-2 vpu-3 vpu-4 vpu-5                                               +            d      power-domain@13                           $        xvpu2                       d          power-domain@14                           %        xvpu3                       d                      watchdog@10007000             mediatek,mt8183-wdt               p                k         syscon@1000c000       "    mediatek,mt8183-apmixedsys syscon                                            (   6      pwrap@1000d000            mediatek,mt8183-pwrap                                 xpwrap                                   )            	  xspi wrap       mt6358            mediatek,mt6358          -                                        mt6358codec           mediatek,mt6358-sound                    mt6358regulator           mediatek,mt6358-regulator      buck_vdram1         vdram1                     L          0                     -        A             buck_vcore          vcore                                j                    -        A             buck_vpa            vpa                    7          P                   A             buck_vproc11            vproc11                              j                    -        A               (         buck_vproc12            vproc12                              j                    -        A               (         buck_vgpu           vgpu                                 j                   A               (         buck_vs2            vs2                    L          0                     -      buck_vmodem         vmodem                               j                   -        A             buck_vs1            vs1          B@         '{l          0                     -      ldo_vdram2          vdram2           	'         w@                   -      ldo_vsim1           vsim1            )2         )2                ldo_vibr            vibr             O         2Z           <      ldo_vrf12             regulator-fixed         vrf12            O         O           x      ldo_vio18             regulator-fixed         vio18            w@         w@          
         -        (   J      ldo_vusb            vusb             -         /M`                   -        (   F      ldo_vcamio            regulator-fixed         vcamio           w@         w@          E        (   2      ldo_vcamd           vcamd                     w@          E      ldo_vcn18             regulator-fixed         vcn18            w@         w@                  (   0      ldo_vfe28             regulator-fixed         vfe28            *         *                ldo_vsram_proc11            vsram_proc11                                 j                    -      ldo_vcn28             regulator-fixed         vcn28            *         *                ldo_vsram_others            vsram_others                                 j                    -      ldo_vsram_gpu         
  vsram_gpu                                j                   (   S      ldo_vxo22             regulator-fixed         vxo22            !         !           x         -      ldo_vefuse          vefuse                                    ldo_vaux18            regulator-fixed         vaux18           w@         w@                ldo_vmch            vmch             ,@          2Z           <      ldo_vbif28            regulator-fixed         vbif28           *         *                ldo_vsram_proc12            vsram_proc12                                 j                    -      ldo_vcama1          vcama1           w@         -          E      ldo_vemc            vemc             ,@          2Z           <        (   I      ldo_vio28             regulator-fixed         vio28            *         *                ldo_va12              regulator-fixed         va12             O         O                   -      ldo_vrf18             regulator-fixed         vrf18            w@         w@           x      ldo_vcn33_bt          	  vcn33_bt             2Z         5g                ldo_vcn33_wifi          vcn33_wifi           2Z         5g                ldo_vcama2          vcama2           *         *          E      ldo_vmc         vmc          w@         2Z           <      ldo_vldo28          vldo28           *         -                ldo_vaud28            regulator-fixed         vaud28           *         *                  (         ldo_vsim2           vsim2            )2         )2                   mt6358rtc             mediatek,mt6358-rtc             scp@10500000              mediatek,mt8183-scp               P             \             	  xsram cfg                                            xmain            Y           okay            gdefault         u      cros_ec           google,cros-ec-rpmsg            cros-ec-rpmsg            timer@10017000        ,    mediatek,mt8183-timer mediatek,mt6765-timer              p                                           iommu@10205000            mediatek,mt8183-m4u               P                                         !   "   #   $   %   &                   (   U      mailbox@10238000              mediatek,mt8183-gce              #       @                                                    xgce         (   T      auxadc@11001000       .    mediatek,mt8183-auxadc mediatek,mt8173-auxadc                                       #        xmain                       okay            (   5      serial@11002000       *    mediatek,mt8183-uart mediatek,mt6577-uart                                         [                          	  xbaud bus            okay            gdefault         u   '      serial@11003000       *    mediatek,mt8183-uart mediatek,mt6577-uart                 0                       \                          	  xbaud bus            okay            gdefault sleep           u   (           )                  \         y      bluetooth           gdefault         u   *        okay              qcom,qca6174-bt               x               +        nvm_00440302_i2s.bin             serial@11004000       *    mediatek,mt8183-uart mediatek,mt6577-uart                 @                       ]                          	  xbaud bus          	  disabled          i2c@11005000              mediatek,mt8183-i2c                P                                    W                 W      *      	  xmain dma                                    +            okay            gdefault         u   ,               i2c@11007000              mediatek,mt8183-i2c                p                                    Q                 
      *      	  xmain dma                                    +            okay            gdefault         u   -            touchscreen@10            hid-over-i2c                                                  gdefault         u   .           
                    i2c@11008000              mediatek,mt8183-i2c                                                    R                       *      G        xmain dma arb                                    +            okay            gdefault         u   /                 '   0   eeprom@54             atmel,24c64             T        3            <   0         i2c@11009000              mediatek,mt8183-i2c                                                   S                       *      I        xmain dma arb                                    +            okay            gdefault         u   1                 '   2   eeprom@58             atmel,24c64             X        3            <   2         spi@1100a000              mediatek,mt8183-spi                      +                                         x                 6                    xparent-clk sel-clk spi-clk          okay            gdefault         u   3        G            [      V      cr50@0            google,cr50                      d B@        gdefault         u   4                                   thermal@1100b000            v             mediatek,mt8183-thermal                                     	      #        xtherm auxadc                                  L              5           6           7        calibration-data            (   `      pwm@1100e000              mediatek,mt8183-disp-pwm                                                       8                                  5        xmain mm         okay            gdefault         u   9        (   d      pwm@11006000              mediatek,mt8183-pwm               `                         0                                              xtop main pwm1 pwm2 pwm3 pwm4          i2c@1100f000              mediatek,mt8183-i2c                                                    T                       *      	  xmain dma                                    +            okay            gdefault         u   :               spi@11010000              mediatek,mt8183-spi                      +                                         |                 6            8        xparent-clk sel-clk spi-clk          okay            gdefault         u   ;        G       spi-flash@0           winbond,w25q64dw jedec,spi-nor                       d}x@         i2c@11011000              mediatek,mt8183-i2c                                                  U                 9      *      	  xmain dma                                    +            okay            gdefault         u   <               spi@11012000              mediatek,mt8183-spi                      +                                                          6            ;        xparent-clk sel-clk spi-clk          okay            gdefault         u   =        G       cros-ec@0             google,cros-ec-spi                       d -                                  gdefault         u   >   i2c-tunnel            google,cros-ec-i2c-tunnel                                   +       sbs-battery@b             sbs,sbs-battery                                            extcon0           google,extcon-usbc-cros-ec          (          cbas              google,cros-cbas          keyboard-controller           google,cros-ec-keyb         ;           K            ^     D  x  ; < = > ? @ A	 B	 C  D  }  0  Y  1   
 d  " # (  \       V 
 |  } )   	  + ^  a    !  % $ '	 &
 +  , . / - 3 2 * 5	 4 9     	  	 

 8 l j       6 	  g i            spi@11013000              mediatek,mt8183-spi                      +                 0                                        6            <        xparent-clk sel-clk spi-clk        	  disabled            gdefault         u   ?        G          i2c@11014000              mediatek,mt8183-i2c               @                                                    H      *      G        xmain dma arb                                    +          	  disabled          i2c@11015000              mediatek,mt8183-i2c               P                                                     J      *      I        xmain dma arb                                    +          	  disabled          i2c@11016000              mediatek,mt8183-i2c               `                                    V                 D      *      E        xmain dma arb                                    +            okay            gdefault         u   @               i2c@11017000              mediatek,mt8183-i2c               p                                                    F      *      E        xmain dma arb                                    +          	  disabled          spi@11018000              mediatek,mt8183-spi                      +                                                         6            K        xparent-clk sel-clk spi-clk        	  disabled            gdefault         u   A        G          spi@11019000              mediatek,mt8183-spi                      +                                                         6            L        xparent-clk sel-clk spi-clk        	  disabled            gdefault         u   B        G          i2c@1101a000              mediatek,mt8183-i2c                                                  X                 b      *      	  xmain dma                                    +          	  disabled          i2c@1101b000              mediatek,mt8183-i2c                                                   Y                 c      *      	  xmain dma                                    +          	  disabled          usb@11201000          #    mediatek,mt8183-mtu3 mediatek,mtu3                        .      >              	  xmac ippc                   H              C      D                 =      Z        xsys_ck ref_ck              E      e                     +                    okay            host                        F   usb@11200000          '    mediatek,mt8183-xhci mediatek,mtk-xhci                                 xmac                I                 =      Z        xsys_ck ref_ck           okay                         +               F   hub@1             usb5e3,610                          syscon@11220000            mediatek,mt8183-audiosys syscon              "                          mmc@11230000              mediatek,mt8183-mmc               #                                     M                                     xsource hclk source_cg           okay            gdefault state_uhs           u   G           H                   h                                                                (        -   I        9   J        F              V      U         m      mmc@11240000              mediatek,mt8183-mmc               $                                     N                 	            (        xsource hclk source_cg           okay            gdefault state_uhs           u   K           L        -   M        9   N        {   O                   h                                                                           m                          F      	        V      V                     +       qca-wifi@1            qcom,ath10k                   
  GO_KODAMA            dsi-phy@11e50000              mediatek,mt8183-mipi-tx                                  6                                   mipi_tx0_pll               P        calibration-data            okay            (   V      efuse@11f10000        %    mediatek,mt8183-efuse mediatek,efuse                                               +      calib@180                         (   7      calib@190                         (   P         t-phy@11f40000        .    mediatek,mt8183-tphy mediatek,generic-tphy-v2                        +                                okay       usb-phy@0                                      xref                    #           okay            (   C      usb-phy@700               	                    xref                    okay            (   D         syscon@13000000           mediatek,mt8183-mfgcfg syscon                                             (   Q      gpu@13040000          &    mediatek,mt8183-mali arm,mali-bifrost                        @       $                                     3job mmu gpu            Q               8      8      8           Ccore0 core1 core2           V   R        j           v   S      syscon@14000000           mediatek,mt8183-mmsys syscon                                                 T          T                 T                  (         ovl@14008000              mediatek,mt8183-disp-ovl                                                       8                            U                           T               ovl@14009000              mediatek,mt8183-disp-ovl-2l                                                    8                            U                          T               ovl@1400a000              mediatek,mt8183-disp-ovl-2l                                                    8                            U                          T               rdma@1400b000             mediatek,mt8183-disp-rdma                                                      8                            U                                     T               rdma@1400c000             mediatek,mt8183-disp-rdma                                                      8                            U                                     T               color@1400e000        6    mediatek,mt8183-disp-color mediatek,mt8173-disp-color                                                      8                            T               ccorr@1400f000            mediatek,mt8183-disp-ccorr                                                     8                            T               aal@14010000          2    mediatek,mt8183-disp-aal mediatek,mt8173-disp-aal                                                      8                            T                gamma@14011000            mediatek,mt8183-disp-gamma                                                    8                            T               dither@14012000           mediatek,mt8183-disp-dither                                                    8                            T                dsi@14014000              mediatek,mt8183-dsi              @                                     8                @                        V        xengine digital hs              V        dphy            okay                         +       panel@0                            -            gdefault         u   W           X           Y        	   Z        	   [        okay              auo,b101uan08.3    port       endpoint            	   \        (   ]            ports      port       endpoint            	   ]        (   \               mutex@14016000            mediatek,mt8183-disp-mutex               `                                     8           	,            larb@14017000             mediatek,mt8183-smi-larb                 p                                                  8           xapb smi         (          smi@14019000              mediatek,mt8183-smi-common                                                                  xapb smi gals0 gals1            8           (         syscon@15020000           mediatek,mt8183-imgsys syscon                                            (         larb@15021000             mediatek,mt8183-smi-larb                                                  	      	              xapb smi gals               8   	        (   %      larb@1502f000             mediatek,mt8183-smi-larb                                                              	        xapb smi gals               8   	        (   "      syscon@16000000           mediatek,mt8183-vdecsys syscon                                            (   ^      larb@16010000             mediatek,mt8183-smi-larb                                                ^       ^           xapb smi            8   
        (   !      syscon@17000000           mediatek,mt8183-vencsys syscon                                            (   _      larb@17010000             mediatek,mt8183-smi-larb                                                _       _            xapb smi            8           (   $      syscon@19000000            mediatek,mt8183-ipu_conn syscon                                           (         syscon@19010000           mediatek,mt8183-ipu_adl syscon                                         syscon@19180000       !    mediatek,mt8183-ipu_core0 syscon                                           syscon@19280000       !    mediatek,mt8183-ipu_core1 syscon                 (                          syscon@1a000000           mediatek,mt8183-camsys syscon                                             (         larb@1a001000             mediatek,mt8183-smi-larb                                                                         xapb smi gals               8           (   &      larb@1a002000             mediatek,mt8183-smi-larb                                                    	      	              xapb smi gals               8           (   #         thermal-zones      cpu-thermal         	@   d        	V          	d   `            	t     trips      trip-point0         	 	        	           passive       trip-point1         	 8        	           passive         (   a      cpu-crit            	 8        	        	   critical             cooling-maps       map0            	   a      0  	                    	         map1            	   a      0  	            	        	               tzts1           	@            	V            	d   `           	t     trips         cooling-maps             tzts2           	@            	V            	d   `           	t     trips         cooling-maps             tzts3           	@            	V            	d   `           	t     trips         cooling-maps             tzts4           	@            	V            	d   `           	t     trips         cooling-maps             tzts5           	@            	V            	d   `           	t     trips         cooling-maps             tztsABB         	@            	V            	d   `           	t     trips         cooling-maps             tboard1         	V          	@            	d   b      tboard2         	V          	@            	d   c         chosen          	serial0:115200n8          backlight_lcd0            pwm-backlight           	   d              	   e                          	              	          
  @        okay            (   [      memory@40000000          memory               @                oscillator1           fixed-clock                                clk32k          (   +      regulator0            regulator-fixed         it6505_pp18          w@         w@        
                   
#      regulator1            regulator-fixed         lcd_pp3300           2Z         2Z         -         
6      regulator2            regulator-fixed       
  bl_pp5000            LK@         LK@         -         
6        (   e      regulator3            regulator-fixed         mmc1_power           2Z         2Z        (   M      regulator4            regulator-fixed         mmc1_io          w@         w@        (   N      regulator5            regulator-fixed         pp1800_alw           -         
6         w@         w@      regulator6            regulator-fixed         pp3300_alw           -         
6         2Z         2Z      reserved-memory                      +               memory@50000000           shared-dma-pool              P                  
H        (            codec0            maxim,max98357a         
O                codec1            linux,bt-sco          wifi-pwrseq           mmc-pwrseq-simple           gdefault         u   f        
\      w           (   O      wifi-wakeup       
    gpio-keys           gdefault         u   g   wowlan          
hWake on WiFi                  q            
n                     thermal-sensor1           generic-adc-thermal         v            
y   5            
sensor-channel          
x              '  %  :  $  N     a  
  u0  	      @        P        `  b     p  ; $   8  ^ L   _   s  ~   J (       8        H           (   b      thermal-sensor2           generic-adc-thermal         v            
y   5           
sensor-channel          
x              '  %  :  $  N     a  
  u0  	      @        P        `  b     p  ; $   8  ^ L   _   s  ~   J (       8        H           (   c      ppvarn-lcd            regulator-fixed         ppvarn_lcd          gdefault         u   h         
#        
      B            (   X      ppvarp-lcd            regulator-fixed         ppvarp_lcd          gdefault         u   i         
#        
                  (   Y      pp1800-lcd            regulator-fixed         pp1800_lcd          gdefault         u   j         
#        
      $            (   Z         	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 i2c9 i2c10 i2c11 ovl0 ovl-2l0 ovl-2l1 rdma0 rdma1 serial0 mmc0 mmc1 cpu device_type reg enable-method capacity-dmips-mhz cpu-idle-states dynamic-power-coefficient #cooling-cells proc-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt interrupts #clock-cells clocks clock-div clock-mult clock-output-names clock-frequency ranges status #interrupt-cells interrupt-controller mediatek,broken-save-restore-fw affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges gpio-line-names pinmux output-low input-enable bias-pull-up mediatek,pull-up-adv mediatek,drive-strength-adv bias-disable drive-strength mediatek,pull-down-adv output-high output-enable #power-domain-cells clock-names mediatek,infracfg domain-supply mediatek,smi Avdd-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-enable-ramp-delay regulator-always-on regulator-allowed-modes memory-region pinctrl-names pinctrl-0 mtk,rpmsg-name mediatek,larbs #iommu-cells #mbox-cells #io-channel-cells pinctrl-1 interrupts-extended enable-gpios firmware-name post-power-on-delay-ms hid-descr-addr vbus-supply pagesize vcc-supply mediatek,pad-select cs-gpios spi-max-frequency #thermal-sensor-cells resets mediatek,auxadc mediatek,apmixedsys nvmem-cells nvmem-cell-names power-domains #pwm-cells google,remote-bus sbs,i2c-retry-count sbs,poll-retry-count google,usb-port-id keypad,num-rows keypad,num-columns google,needs-ghost-filter linux,keymap phys mediatek,syscon-wakeup dr_mode wakeup-source vusb33-supply bus-width cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v cap-mmc-hw-reset no-sdio no-sd hs400-ds-delay vmmc-supply vqmmc-supply assigned-clocks assigned-clock-parents non-removable mmc-pwrseq drv-type cap-sd-highspeed sd-uhs-sdr50 sd-uhs-sdr104 keep-power-in-suspend enable-sdio-wakeup cap-sdio-irq no-mmc qcom,ath10k-calibration-variant #phy-cells mediatek,discth interrupt-names power-domain-names operating-points-v2 mali-supply sram-supply mboxes mediatek,gce-client-reg iommus mediatek,larb mediatek,rdma-fifo-size mediatek,syscon-dsi phy-names avdd-supply avee-supply pp1800-supply backlight remote-endpoint mediatek,gce-events polling-delay-passive polling-delay thermal-sensors sustainable-power temperature hysteresis trip cooling-device contribution stdout-path pwms power-supply brightness-levels num-interpolated-steps default-brightness-level gpio enable-active-high regulator-boot-on no-map sdmode-gpios reset-gpios label linux,code io-channels io-channel-names temperature-lookup-table 