  d   8  ^   (              ]                                 rockchip,r88 rockchip,rk3368                                     +            7Rockchip R88       aliases          =/ethernet@ff290000           G/i2c@ff650000            L/i2c@ff660000            Q/i2c@ff140000            V/i2c@ff150000            [/i2c@ff160000            `/i2c@ff170000            e/serial@ff180000             m/serial@ff190000             u/serial@ff690000             }/serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /mmc@ff0d0000            /mmc@ff0f0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3               	            cpu@0            cpu           arm,cortex-a53                            psci                                  cpu@1            cpu           arm,cortex-a53                           psci                                  cpu@2            cpu           arm,cortex-a53                           psci                                  cpu@3            cpu           arm,cortex-a53                           psci                            	      cpu@100          cpu           arm,cortex-a53                           psci                                  cpu@101          cpu           arm,cortex-a53                          psci                                  cpu@102          cpu           arm,cortex-a53                          psci                                  cpu@103          cpu           arm,cortex-a53                          psci                                     arm-pmu           arm,armv8-pmuv3       `          p          q          r          s          t          u          v          w                         	                  psci              arm,psci-0.2             smc       timer             arm,armv8-timer       0                                 
        oscillator            fixed-clock          n6         xin24m                     mmc@ff0c0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         -р         ;   
     
   D   
   r   
   v        Bbiu ciu ciu-drive ciu-sample            N                               Y   
           `reset         	  ldisabled          mmc@ff0d0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         -р         ;   
     
   E   
   s   
   w        Bbiu ciu ciu-drive ciu-sample            N                   !           Y   
           `reset           lokay            s   
   E           
                                                                     default                          	                    mmc@ff0f0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         -р         ;   
     
   G   
   u   
   y        Bbiu ciu ciu-drive ciu-sample            N                   #           Y   
           `reset           lokay                        "                            default                        saradc@ff100000           rockchip,saradc                                       $           4           ;   
   I   
  [        Bsaradc apb_pclk         Y   
   W        `saradc-apb          lokay            F         spi@ff110000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               ;   
   A   
  R        Bspiclk apb_pclk                 ,           default                                          +          	  ldisabled          spi@ff120000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               ;   
   B   
  S        Bspiclk apb_pclk                 -           default                                          +          	  ldisabled          spi@ff130000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               ;   
   C   
  T        Bspiclk apb_pclk                 )           default                      !                     +          	  ldisabled          i2c@ff140000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       >                        +            Bi2c         ;   
  N        default            "      	  ldisabled          i2c@ff150000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       ?                        +            Bi2c         ;   
  O        default            #      	  ldisabled          i2c@ff160000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       @                        +            Bi2c         ;   
  P        default            $      	  ldisabled          i2c@ff170000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       A                        +            Bi2c         ;   
  Q        default            %      	  ldisabled          serial@ff180000       &    rockchip,rk3368-uart snps,dw-apb-uart                                  n6         ;   
   M   
  U        Bbaudclk apb_pclk                    7           R           \         	  ldisabled          serial@ff190000       &    rockchip,rk3368-uart snps,dw-apb-uart                                  n6         ;   
   N   
  V        Bbaudclk apb_pclk                    8           R           \         	  ldisabled          serial@ff1b0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                  n6         ;   
   P   
  X        Bbaudclk apb_pclk                    :           R           \         	  ldisabled          serial@ff1c0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                  n6         ;   
   Q   
  Y        Bbaudclk apb_pclk                    ;           R           \         	  ldisabled          dma-controller@ff250000           arm,pl330 arm,primecell              %        @                                      i            t                 ;   
         	  Bapb_pclk          thermal-zones      cpu-thermal            d                     &       trips      cpu_alert0           $                   passive             '      cpu_alert1           8                   passive             (      cpu_crit             s                	   critical             cooling-maps       map0               '      0                    map1               (      0              	            gpu-thermal            d                     &      trips      gpu_alert0           8                   passive             )      gpu_crit             8                	   critical             cooling-maps       map0               )      0                             tsadc@ff280000            rockchip,rk3368-tsadc                (                         %           ;   
   H   
  Z        Btsadc apb_pclk          Y   
         
  `tsadc-apb           init default sleep             *           +           *                   / s        lokay            F            ]                &      ethernet@ff290000             rockchip,rk3368-gmac                 )                                    xmacirq             ,      8  ;   
      
   f   
   g   
   c   
      
      
  ]      M  Bstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            lokay               -        rmii            output             .                              ' B@        default            /           0                 usb@ff500000              generic-ehci                 P                                    ;   
          lokay          usb@ff580000          2    rockchip,rk3368-usb rockchip,rk3066-usb snps,dwc2                X                                    ;   
          Botg         host                                 ,            @   @            lokay          dma-controller@ff600000           arm,pl330 arm,primecell              `        @                                       i            t                 ;   
         	  Bapb_pclk                7      i2c@ff650000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              e                 ;   
  L        Bi2c                 <           default            0                     +            lokay       syr827@40             silergy,syr827              @        ;           Xvdd_cpu         g  ,         
4         `          @                             1      hym8563@51            haoyu,hym8563               Q                                 xin32k              F         i2c@ff660000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              f                         =                        +            Bi2c         ;   
  M        default            2      	  ldisabled          pwm@ff680000          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            default            3        ;   
  _      	  ldisabled          pwm@ff680010          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                           default            4        ;   
  _      	  ldisabled          pwm@ff680020          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            ;   
  _      	  ldisabled          pwm@ff680030          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h 0                          default            5        ;   
  _      	  ldisabled          serial@ff690000       &    rockchip,rk3368-uart snps,dw-apb-uart                i                 ;   
   O   
  W        Bbaudclk apb_pclk                    9           default            6        R           \           lokay          mbox@ff6b0000             rockchip,rk3368-mailbox              k               0                                                   ;   
  E        Bpclk_mailbox                     	  ldisabled          syscon@ff738000       )    rockchip,rk3368-pmugrf syscon simple-mfd                 s                    :   io-domains        &    rockchip,rk3368-pmu-io-voltage-domain           lokay                                reboot-mode           syscon-reboot-mode          &           -RB         9RB        GRB	        WRB         clock-controller@ff760000             rockchip,rk3368-cru              v                    ,                    c               
      syscon@ff770000       &    rockchip,rk3368-grf syscon simple-mfd                w                     ,   io-domains        "    rockchip,rk3368-io-voltage-domain           lokay            p           }                                  watchdog@ff800000              rockchip,rk3368-wdt snps,dw-wdt                               ;   
  p                O           lokay          timer@ff810000        ,    rockchip,rk3368-timer rockchip,rk3288-timer                                        B           ;   
  a   
   U        Bpclk timer        spdif@ff880000            rockchip,rk3368-spdif                                         6           ;   
   S   
        
  Bmclk hclk              7           tx          default            8      	  ldisabled          i2s-2ch@ff890000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                       (           Bi2s_clk i2s_hclk            ;   
   T   
             7      7           tx rx         	  ldisabled          i2s-8ch@ff898000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                      5           Bi2s_clk i2s_hclk            ;   
   R   
             7       7           tx rx           default            9      	  ldisabled          iommu@ff900800            rockchip,iommu                                                  xiep_mmu         ;   
      
          Baclk iface                    	  ldisabled          iommu@ff914000            rockchip,iommu                @            P                                   xisp_mmu         ;   
      
          Baclk iface                             	  ldisabled          iommu@ff930300            rockchip,iommu                                                  xvop_mmu         ;   
      
          Baclk iface                    	  ldisabled          iommu@ff9a0440            rockchip,iommu                @       @           @                         	  xhevc_mmu            ;   
      
          Baclk iface                    	  ldisabled          iommu@ff9a0800            rockchip,iommu                                       	          
           xvepu_mmu vdpu_mmu           ;   
      
          Baclk iface                    	  ldisabled          efuse@ffb00000            rockchip,rk3368-efuse                                               +           ;   
  q        Bpclk_efuse     cpu-leakage@17                       temp-adjust@1f                          interrupt-controller@ffb71000             arm,gic-400                                        @                                 @             `                        	                    pinctrl           rockchip,rk3368-pinctrl            ,           :                     +               gpio0@ff750000            rockchip,gpio-bank               u                 ;   
  @                Q                    (                                   C      gpio1@ff780000            rockchip,gpio-bank               x                 ;   
  A                R                    (                             gpio2@ff790000            rockchip,gpio-bank               y                 ;   
  B                S                    (                                   A      gpio3@ff7a0000            rockchip,gpio-bank               z                 ;   
  C                T                    (                                   .      pcfg-pull-up             4            =      pcfg-pull-down           A      pcfg-pull-none           P            >      pcfg-pull-none-12ma          P        ]               ?      emmc       emmc-clk            l            ;                  emmc-cmd            l            <                  emmc-pwr            l            =      emmc-bus1           l            =      emmc-bus4         @  l            =            =            =            =      emmc-bus8           l            <            <            <            <            <            <            <            <                  emmc-reset          l             >            @         gmac       rgmii-pins          l            >            >            >            ?      	      ?      
      ?            ?            ?            ?            >            >            >            >            >            >      rmii-pins           l            >            >            >            ?      	      ?            ?            >            >            >            >            /         i2c0       i2c0-xfer            l             >             >            0         i2c1       i2c1-xfer            l            >            >            2         i2c2       i2c2-xfer            l       	      >            >            "         i2c3       i2c3-xfer            l            >            >            #         i2c4       i2c4-xfer            l            >            >            $         i2c5       i2c5-xfer            l            >            >            %         i2s    i2s-8ch-bus         l            >            >            >            >            >            >            >            >            >            9         pwm0       pwm0-pin            l            >            3         pwm1       pwm1-pin            l             >            4         pwm3       pwm3-pin            l            >            5         sdio0      sdio0-bus1          l            =      sdio0-bus4        @  l            =            =            =            =                  sdio0-cmd           l             =                  sdio0-clk           l            >                  sdio0-cd            l            =      sdio0-wp            l            =      sdio0-pwr           l            =      sdio0-bkpwr         l            =      sdio0-int           l            =         sdmmc      sdmmc-clk           l      	      >      sdmmc-cmd           l      
      =      sdmmc-cd            l            =      sdmmc-bus1          l            =      sdmmc-bus4        @  l            =            =            =            =         spdif      spdif-tx            l            >            8         spi0       spi0-clk            l            =                  spi0-cs0            l            =                  spi0-cs1            l            =      spi0-tx         l            =                  spi0-rx         l            =                     spi1       spi1-clk            l            =                  spi1-cs0            l            =                  spi1-cs1            l            =      spi1-rx         l            =                  spi1-tx         l            =                     spi2       spi2-clk            l             =                  spi2-cs0            l             =            !      spi2-rx         l       
      =                   spi2-tx         l             =                     tsadc      otp-pin         l              >            *      otp-out         l             >            +         uart0      uart0-xfer           l            =            >      uart0-cts           l            >      uart0-rts           l            >         uart1      uart1-xfer           l             =             >      uart1-cts           l             >      uart1-rts           l             >         uart2      uart2-xfer           l            =            >            6         uart3      uart3-xfer           l            =            >      uart3-cts           l            >      uart3-rts           l            >         uart4      uart4-xfer           l             =             >      uart4-cts           l             >      uart4-rts           l             >         pcfg-pull-none-drv-8ma           P        ]               ;      pcfg-pull-up-drv-8ma             4        ]               <      ir     ir-int          l             =            E         keys       pwr-key         l              =            B         leds       stby-pwren          l              >      led-ctl         l             >            D         sdio       wifi-reg-on         l             >            H      bt-rst          l             >            G         usb    host-vbus-drv           l              >            I            chosen          zserial2:115200n8          memory           memory                       @         emmc-pwrseq           mmc-pwrseq-emmc            @        default            A                         gpio-keys         
    gpio-keys           default            B   power                       C              GPIO Power             t         gpio-leds         
    gpio-leds      led-0              .               r88:green:led           default            D         ir-receiver           gpio-ir-receiver               .              default            E      sdio-pwrseq           mmc-pwrseq-simple           ;   F      
  Bext_clock           default            G   H           .         .                        vcc18-regulator           regulator-fixed         Xvcc_18           w@         w@                             1                  vcc-host-regulator            regulator-fixed                     C               default            I      	  Xvcc_host                                 1      vcc-io-regulator              regulator-fixed         Xvcc_io           2Z         2Z                             1                  vcc-lan-regulator             regulator-fixed         Xvcc_lan          2Z         2Z                                         -      vcc-sys-regulator             regulator-fixed         Xvcc_sys          LK@         LK@                              1      vccio-wl-regulator            regulator-fixed       	  Xvccio_wl             2Z         2Z                                               vdd-10-regulator              regulator-fixed         Xvdd_10           B@         B@                             1         	compatible interrupt-parent #address-cells #size-cells model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 mmc0 mmc1 cpu device_type reg enable-method #cooling-cells phandle interrupts interrupt-affinity clock-frequency clock-output-names #clock-cells max-frequency clocks clock-names fifo-depth resets reset-names status assigned-clocks assigned-clock-parents bus-width cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable pinctrl-names pinctrl-0 vmmc-supply vqmmc-supply cap-mmc-highspeed #io-channel-cells vref-supply reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names rockchip,grf phy-supply phy-mode clock_in_out snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size fcs,suspend-voltage-selector regulator-name regulator-enable-ramp-delay regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-boot-on vin-supply #pwm-cells #mbox-cells pmu-supply vop-supply offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells audio-supply gpio30-supply gpio1830-supply wifi-supply dmas dma-names #iommu-cells rockchip,disable-mmu-reset interrupt-controller #interrupt-cells rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins stdout-path reset-gpios wakeup-source label linux,code enable-active-high 