  h   8  a   (              a                             '    tsd,rk3368-lion-haikou rockchip,rk3368                                   +         '   7Theobroma Systems RK3368-uQ7 Baseboard     aliases          =/ethernet@ff290000           G/i2c@ff650000            L/i2c@ff660000            Q/i2c@ff140000            V/i2c@ff150000            [/i2c@ff160000            `/i2c@ff170000            e/serial@ff180000             m/serial@ff190000             u/serial@ff690000             }/serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /mmc@ff0f0000            /mmc@ff0c0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3               	            cpu@0            cpu           arm,cortex-a53                            psci                            
                  cpu@1            cpu           arm,cortex-a53                           psci                            
                  cpu@2            cpu           arm,cortex-a53                           psci                            
                  cpu@3            cpu           arm,cortex-a53                           psci                            
            	      cpu@100          cpu           arm,cortex-a53                           psci                            
                  cpu@101          cpu           arm,cortex-a53                          psci                            
                  cpu@102          cpu           arm,cortex-a53                          psci                            
                  cpu@103          cpu           arm,cortex-a53                          psci                            
                     arm-pmu           arm,armv8-pmuv3       `          p          q          r          s          t          u          v          w                         	                  psci              arm,psci-0.2             smc       timer             arm,armv8-timer       0                                 
        oscillator            fixed-clock         n6         xin24m          +          mmc@ff0c0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         8}x@         F           D      r      v        Mbiu ciu ciu-drive ciu-sample            Y                               d              kreset           wokay            ~                                                       default                             Z                 mmc@ff0d0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         8р         F           E      s      w        Mbiu ciu ciu-drive ciu-sample            Y                   !           d              kreset         	  wdisabled          mmc@ff0f0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         8р         F           G      u      y        Mbiu ciu ciu-drive ciu-sample            Y                   #           d              kreset           wokay            ~           р                                                default                        saradc@ff100000           rockchip,saradc                                       $           +           F      I     [        Msaradc apb_pclk         d      W        ksaradc-apb        	  wdisabled          spi@ff110000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               F      A     R        Mspiclk apb_pclk                 ,           default                                          +          	  wdisabled          spi@ff120000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               F      B     S        Mspiclk apb_pclk                 -           default                                          +            wokay       flash@0           jedec,spi-nor                        =         spi@ff130000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               F      C     T        Mspiclk apb_pclk                 )           default                      !                     +            wokay            O                   i2c@ff140000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       >                        +            Mi2c         F     N        default            "        wokay                G      i2c@ff150000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       ?                        +            Mi2c         F     O        default            #      	  wdisabled          i2c@ff160000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       @                        +            Mi2c         F     P        default            $      	  wdisabled          i2c@ff170000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       A                        +            Mi2c         F     Q        default            %      	  wdisabled          serial@ff180000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         F      M     U        Mbaudclk apb_pclk                    7           X           b           wokay            default            &   '   (      serial@ff190000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         F      N     V        Mbaudclk apb_pclk                    8           X           b         	  wdisabled          serial@ff1b0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         F      P     X        Mbaudclk apb_pclk                    :           X           b           wokay          serial@ff1c0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         F      Q     Y        Mbaudclk apb_pclk                    ;           X           b         	  wdisabled          dma-controller@ff250000           arm,pl330 arm,primecell              %        @                                      o            z                 F            	  Mapb_pclk          thermal-zones      cpu-thermal            d                     )       trips      cpu_alert0           $                   passive             *      cpu_alert1           8                   passive             +      cpu_crit             s                	   critical             cooling-maps       map0               *      0                    map1               +      0              	            gpu-thermal            d                     )      trips      gpu_alert0           8                   passive             ,      gpu_crit             8                	   critical             cooling-maps       map0               ,      0                             tsadc@ff280000            rockchip,rk3368-tsadc                (                         %           F      H     Z        Mtsadc apb_pclk          d            
  ktsadc-apb           init default sleep             -           .           -                   5 s      	  wdisabled                )      ethernet@ff290000             rockchip,rk3368-gmac                 )                                    Lmacirq          \   /      8  F            f      g      c                 ]      M  Mstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            wokay            i              y   0        input                      rgmii           default            1                       '  P           2                                  usb@ff500000              generic-ehci                 P                                    F             wokay          usb@ff580000          2    rockchip,rk3368-usb rockchip,rk3066-usb snps,dwc2                X                                    F             Motg         otg                              '            @   @            wokay          dma-controller@ff600000           arm,pl330 arm,primecell              `        @                                       o            z                 F            	  Mapb_pclk                =      i2c@ff650000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              e                 F     L        Mi2c                 <           default            3                     +            wokay       pmic@1b           rockchip,rk808                          4                       xin32k rk808-clkout2            +           default            5   6         6        W   7        c   7        o   7        {   7           7           7           7           7           7           7           7   regulators     DCDC_REG1           vdd_cpu          
`         `                  1            
      DCDC_REG2           vdd_log          
`         `                  1      DCDC_REG3           vcc_ddr                   1      DCDC_REG4         	  vcc33_io             2Z         2Z                  1                  LDO_REG2            vcc33_video          2Z         2Z                  1      LDO_REG3          
  vdd10_pll            B@         B@                  1      LDO_REG4          	  vcc18_io             w@         w@         1                  LDO_REG6            vdd10_video          B@         B@                  1      LDO_REG8            vcc18_video          w@         w@                  1               i2c@ff660000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              f                         =                        +            Mi2c         F     M        default            8        wokay                E      pwm@ff680000          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                 C           default            9        F     _      	  wdisabled          pwm@ff680010          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                C           default            :        F     _      	  wdisabled          pwm@ff680020          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                 C           F     _      	  wdisabled          pwm@ff680030          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h 0               C           default            ;        F     _      	  wdisabled          serial@ff690000       &    rockchip,rk3368-uart snps,dw-apb-uart                i                 F      O     W        Mbaudclk apb_pclk                    9           default            <        X           b         	  wdisabled          mbox@ff6b0000             rockchip,rk3368-mailbox              k               0                                                   F     E        Mpclk_mailbox            N         	  wdisabled          syscon@ff738000       )    rockchip,rk3368-pmugrf syscon simple-mfd                 s                    @   io-domains        &    rockchip,rk3368-pmu-io-voltage-domain         	  wdisabled          reboot-mode           syscon-reboot-mode          Z           aRB         mRB        {RB	        RB         clock-controller@ff760000             rockchip,rk3368-cru              v                 \   /        +                                syscon@ff770000       &    rockchip,rk3368-grf syscon simple-mfd                w                     /   io-domains        "    rockchip,rk3368-io-voltage-domain         	  wdisabled             watchdog@ff800000              rockchip,rk3368-wdt snps,dw-wdt                               F     p                O           wokay          timer@ff810000        ,    rockchip,rk3368-timer rockchip,rk3288-timer                                        B           F     a      U        Mpclk timer        spdif@ff880000            rockchip,rk3368-spdif                                         6           F      S           
  Mmclk hclk              =           tx          default            >      	  wdisabled          i2s-2ch@ff890000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                       (           Mi2s_clk i2s_hclk            F      T                =      =           tx rx         	  wdisabled          i2s-8ch@ff898000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                      5           Mi2s_clk i2s_hclk            F      R                =       =           tx rx           default            ?      	  wdisabled          iommu@ff900800            rockchip,iommu                                                  Liep_mmu         F                   Maclk iface                    	  wdisabled          iommu@ff914000            rockchip,iommu                @            P                                   Lisp_mmu         F                   Maclk iface                             	  wdisabled          iommu@ff930300            rockchip,iommu                                                  Lvop_mmu         F                   Maclk iface                    	  wdisabled          iommu@ff9a0440            rockchip,iommu                @       @           @                         	  Lhevc_mmu            F                   Maclk iface                    	  wdisabled          iommu@ff9a0800            rockchip,iommu                                       	          
           Lvepu_mmu vdpu_mmu           F                   Maclk iface                    	  wdisabled          efuse@ffb00000            rockchip,rk3368-efuse                                               +           F     q        Mpclk_efuse     cpu-leakage@17                       temp-adjust@1f                          interrupt-controller@ffb71000             arm,gic-400                                        @                                 @             `                        	                    pinctrl           rockchip,rk3368-pinctrl         \   /           @                     +                    default            A   gpio0@ff750000            rockchip,gpio-bank               u                 F     @                Q                    %                                   4      gpio1@ff780000            rockchip,gpio-bank               x                 F     A                R                    %                                   F      gpio2@ff790000            rockchip,gpio-bank               y                 F     B                S                    %                                         gpio3@ff7a0000            rockchip,gpio-bank               z                 F     C                T                    %                                   2      pcfg-pull-up             1            C      pcfg-pull-down           >      pcfg-pull-none           M            B      pcfg-pull-none-12ma          M        Z               D      emmc       emmc-clk            i            B                  emmc-cmd            i            C                  emmc-pwr            i            C      emmc-bus1           i            C      emmc-bus4         @  i            C            C            C            C      emmc-bus8           i            C            C            C            C            C            C            C            C                     gmac       rgmii-pins          i            B            B            B            D      	      D      
      D            D            D            D            B            B            B            B            B            B            1      rmii-pins           i            B            B            B            D      	      D            D            B            B            B            B         i2c0       i2c0-xfer            i             B             B            3         i2c1       i2c1-xfer            i            B            B            8         i2c2       i2c2-xfer            i       	      B            B            "         i2c3       i2c3-xfer            i            B            B            #         i2c4       i2c4-xfer            i            B            B            $         i2c5       i2c5-xfer            i            B            B            %         i2s    i2s-8ch-bus         i            B            B            B            B            B            B            B            B            B            ?         pwm0       pwm0-pin            i            B            9         pwm1       pwm1-pin            i             B            :         pwm3       pwm3-pin            i            B            ;         sdio0      sdio0-bus1          i            C      sdio0-bus4        @  i            C            C            C            C      sdio0-cmd           i             C      sdio0-clk           i            B      sdio0-cd            i            C      sdio0-wp            i            C      sdio0-pwr           i            C      sdio0-bkpwr         i            C      sdio0-int           i            C         sdmmc      sdmmc-clk           i      	      B                  sdmmc-cmd           i      
      C                  sdmmc-cd            i            C      sdmmc-bus1          i            C      sdmmc-bus4        @  i            C            C            C            C                  sdmmc-cd-pin            i             B         spdif      spdif-tx            i            B            >         spi0       spi0-clk            i            C                  spi0-cs0            i            C                  spi0-cs1            i            C      spi0-tx         i            C                  spi0-rx         i            C                     spi1       spi1-clk            i            C                  spi1-cs0            i            C                  spi1-cs1            i            C      spi1-rx         i            C                  spi1-tx         i            C                     spi2       spi2-clk            i             C                  spi2-cs0            i             C            !      spi2-rx         i       
      C                   spi2-tx         i             C                     tsadc      otp-pin         i              B            -      otp-out         i             B            .         uart0      uart0-xfer           i            C            B            &      uart0-cts           i            B            '      uart0-rts           i            B            (         uart1      uart1-xfer           i             C             B      uart1-cts           i             B      uart1-rts           i             B         uart2      uart2-xfer           i            C            B            <         uart3      uart3-xfer           i            C            B      uart3-cts           i            B      uart3-rts           i            B         uart4      uart4-xfer           i             C             B      uart4-cts           i             B      uart4-rts           i             B         leds       module-led-pins          i             B             B            H      sd-card-led-pin         i              B            I         pmic       pmic-int-l          i              C            5      pmic-sleep          i              B            6         hog    haikou-pin-hog        @  i             C              C             C              C            A         usb_otg    otg-vbus-drv            i              B            K            chosen          wserial0:115200n8          gmac-clk              fixed-clock         sY@      	  ext_gmac            +                0      i2cmux1           i2c-mux-gpio                         +               E           F          i2c@0                                     +          i2c@1                                    +             i2cmux2           i2c-mux-gpio                         +               G           F          i2c@0                                     +       fan@18            ti,amc6821                                rtc@6f            isil,isl1208                o      eeprom@50             atmel,24c01                        P         i2c@1                                    +             leds          
    gpio-leds           default            H   I   led-1           module_led1                         
  heartbeat                  led-2           module_led2            2               off       led-3           sd_card_led            4               mmc0             vcc-sys-regulator             regulator-fixed         vcc_sys          LK@         LK@                  1            7      dc-12v            regulator-fixed         dc_12v                    1                                J      vcc3v3-baseboard              regulator-fixed         vcc3v3_baseboard                      1         2Z         2Z           J                  vcc5v0-otg-regulator              regulator-fixed                     4               default            K        vcc5v0_otg                    	compatible interrupt-parent #address-cells #size-cells model ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 mmc0 mmc1 cpu device_type reg enable-method #cooling-cells cpu-supply phandle interrupts interrupt-affinity clock-frequency clock-output-names #clock-cells max-frequency clocks clock-names fifo-depth resets reset-names status bus-width cap-mmc-highspeed cap-sd-highspeed cd-gpios disable-wp pinctrl-names pinctrl-0 rockchip,default-sample-phase vmmc-supply mmc-hs200-1_8v non-removable vqmmc-supply #io-channel-cells spi-max-frequency cs-gpios reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp interrupt-names rockchip,grf assigned-clocks assigned-clock-parents clock_in_out phy-supply phy-mode snps,reset-active-low snps,reset-delays-us snps,reset-gpio tx_delay rx_delay dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size rockchip,system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on #pwm-cells #mbox-cells offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells dmas dma-names #iommu-cells rockchip,disable-mmu-reset interrupt-controller #interrupt-cells rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins stdout-path i2c-parent mux-gpios pagesize label linux,default-trigger panic-indicator default-state vin-supply enable-active-high 