     8     (            
$                               '    friendlyarm,nanopi-r2s rockchip,rk3328                                   +            7FriendlyElec NanoPi R2S    aliases          =/serial@ff110000             E/serial@ff120000             M/serial@ff130000             U/i2c@ff150000            Z/i2c@ff160000            _/i2c@ff170000            d/i2c@ff180000            i/ethernet@ff540000           s/usb@ff600000/device@2           }/mmc@ff500000         cpus                         +       cpu@0            cpu           arm,cortex-a53                                                                      x         psci                                                  	      cpu@1            cpu           arm,cortex-a53                                                                     x         psci                                                  
      cpu@2            cpu           arm,cortex-a53                                                                     x         psci                                                        cpu@3            cpu           arm,cortex-a53                                                                     x         psci                                                        idle-states         psci       cpu-sleep             arm,idle-state           %        6           M   x        ^           n                      l2-cache0             cache                       opp_table0            operating-points-v2                        opp-408000000               Q          ~          @               opp-600000000               #F          ~          @      opp-816000000               0,          B@          @      opp-1008000000              <                    @      opp-1200000000              G          (          @      opp-1296000000              M?d                     @         analog-sound              simple-audio-card           i2s                    Analog        	  disabled       simple-audio-card,cpu                    simple-audio-card,codec                     arm-pmu           arm,cortex-a53-pmu        0         d          e          f          g           "   	   
            display-subsystem             rockchip,display-subsystem          5         	  disabled          hdmi-sound            simple-audio-card           i2s                    HDMI          	  disabled       simple-audio-card,cpu                    simple-audio-card,codec                     psci              arm,psci-1.0 arm,psci-0.2            smc       timer             arm,armv8-timer       0                                
        xin24m            fixed-clock         ;            Hn6         Xxin24m             D      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                         )     7        ki2s_clk i2s_hclk            w                    |tx rx                     	  disabled                     i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        *     8        ki2s_clk i2s_hclk            w                    |tx rx                     	  disabled                     i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        +     9        ki2s_clk i2s_hclk            w                     |tx rx                     	  disabled          spdif@ff030000            rockchip,rk3328-spdif                                                          .     :      
  kmclk hclk           w      
        |tx          default                              	  disabled          pdm@ff040000              rockchip,pdm                                         =     R        kpdm_clk pdm_hclk            w              |rx          default sleep                                                       	  disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd                                    :   io-domains        "    rockchip,rk3328-io-voltage-domain           okay                                                                                       gpio              rockchip,rk3328-grf-gpio                     *         power-controller          !    rockchip,rk3328-power-controller            6                        +               <   power-domain@6                      6          power-domain@5                      6          power-domain@8                                  F        6             reboot-mode           syscon-reboot-mode          J          QRB         ]RB        kRB	        {RB         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        7                  &              kbaudclk apb_pclk            w                    |tx rx           default                !   "                            	  disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        8                  '              kbaudclk apb_pclk            w                    |tx rx           default            #   $   %                            	  disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        9                  (              kbaudclk apb_pclk            w                    |tx rx           default            &                              okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      $                        +                   7            	  ki2c pclk            default            '      	  disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      %                        +                   8            	  ki2c pclk            default            (        okay       pmic@18           rockchip,rk805                          )                      ;           Xxin32k rk805-clkout2                     *              *        default                              +           +           +           +                   	   +   regulators     DCDC_REG1           vdd_log          $         8        J 
4        b          z  0   regulator-state-mem                   B@         DCDC_REG2           vdd_arm          $         8        J 
4        b          z  0              regulator-state-mem                   ~         DCDC_REG3           vcc_ddr          $         8   regulator-state-mem                   DCDC_REG4         
  vcc_io_33            $         8        J 2Z        b 2Z              regulator-state-mem                   2Z         LDO_REG1            vcc_18           $         8        J w@        b w@              regulator-state-mem                   w@         LDO_REG2            vcc18_emmc           $         8        J w@        b w@              regulator-state-mem                   w@         LDO_REG3            vdd_10           $         8        J B@        b B@   regulator-state-mem                   B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      &                        +                   9            	  ki2c pclk            default            ,      	  disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      '                        +                   :            	  ki2c pclk            default            -      	  disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi                                      1                        +                                  kspiclk apb_pclk         w            	        |tx rx           default            .   /   0   1      	  disabled          watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt                                      (                        pwm@ff1b0000              rockchip,rk3328-pwm                                      <            	  kpwm pclk            default            2                 	  disabled          pwm@ff1b0010              rockchip,rk3328-pwm                                     <            	  kpwm pclk            default            3                 	  disabled          pwm@ff1b0020              rockchip,rk3328-pwm                                      <            	  kpwm pclk            default            4                   okay          pwm@ff1b0030              rockchip,rk3328-pwm               0                      2                  <            	  kpwm pclk            default            5                 	  disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell                      @                                                            	  kapb_pclk                                thermal-zones      soc-thermal                                        &   6       trips      trip-point0         6 p        B           passive       trip-point1         6 L        B           passive            7      soc-crit            6 s        B        	   critical             cooling-maps       map0            M   7      0  R   	   
              a                  tsadc@ff250000            rockchip,rk3328-tsadc                %                        :           n      $        ~  P               $              ktsadc apb_pclk          init default sleep             8           9           8              B      
  tsadc-apb              :                            okay                                       6      efuse@ff260000            rockchip,rk3328-efuse                &         P                     +                  >        kpclk_efuse                 id@7                         cpu-leakage@17                       logic-leakage@19                         cpu-version@1a                         0                 E         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc                (                        P           5                  %              ksaradc apb_pclk               V        saradc-apb        	  disabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450                0               T         Z          W          ]          X          Y          [          \         "  Ggp gpmmu pp pp0 ppmmu0 pp1 ppmmu1                              	  kbus core                  f      iommu@ff330200            rockchip,iommu               3                       `         
  Gh265e_mmu                                kaclk iface          W          	  disabled          iommu@ff340800            rockchip,iommu               4        @               b         	  Gvepu_mmu                        F        kaclk iface          W          	  disabled          video-codec@ff350000              rockchip,rk3328-vpu              5                        	           Gvdpu                        F      
  kaclk hclk           d   ;        k   <         iommu@ff350800            rockchip,iommu               5        @                          Gvpu_mmu                     F        kaclk iface          W            k   <              ;      iommu@ff360480            rockchip,iommu                6       @    6       @               J           Grkvdec_mmu                      B        kaclk iface          W          	  disabled          vop@ff370000              rockchip,rk3328-vop              7        >                                        x     ;        kaclk_vop dclk_vop hclk_vop                                    axi ahb dclk            d   =      	  disabled       port                         +                  endpoint@0                       y   >           C            iommu@ff373f00            rockchip,iommu               7?                                   Gvop_mmu                     ;        kaclk iface          W          	  disabled               =      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi              <                                   #          G                        F              kiahb isfr cec              ?        hdmi            default            @   A   B           :                  	  disabled                  ports      port       endpoint            y   C           >               codec@ff410000            rockchip,rk3328-codec                A                              *      
  kpclk mclk              :                  	  disabled                     phy@ff430000              rockchip,rk3328-hdmi-phy                 C                        S                     D      y        ksysclk refoclk refpclk        	  Xhdmi_phy            ;               E        cpu-version                   	  disabled               ?      clock-controller@ff440000         (    rockchip,rk3328-cru rockchip,cru syscon              D                    :        ;                      n      x      =            &      '      (                                                      A      B      D      C      "      \      5                             H                 4                  $        z               D   D   D      |  ~         n6 n6 n6          n6 #F L  G рxhxhрxhxh                    syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd                E                              +      usb2phy@100           rockchip,rk3328-usb2phy                            D        kphyclk          Xusb480m_phy         ;            n      {           F        okay               F   otg-port                      $         ;          <          =           Gotg-bvalid otg-id linestate         okay               S      host-port                              >         
  Glinestate           okay               T            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              P        @                                  =      !      J      N        kbiu ciu ciu-drive ciu-sample                       р        okay                                            G   H   I   J        default          #         0         =         J        X   K        d         mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              Q        @                                  >      "      K      O        kbiu ciu ciu-drive ciu-sample                       р      	  disabled          mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              R        @                                  ?      #      L      P        kbiu ciu ciu-drive ciu-sample                       р      	  disabled          ethernet@ff540000             rockchip,rk3328-gmac                 T                                   Gmacirq        8         d      W      X      Z      Y                  M  kstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                  c      
  stmmaceth              :        q           okay            n      d      f           L   L        |input              M        rgmii                         N        default                                $   mdio              snps,dwmac-mdio                      +       ethernet-phy@1                         O        default           '          P           )                 M            ethernet@ff550000             rockchip,rk3328-gmac                 U                    :                          Gmacirq        8         T      S      S      U                  V      I  kstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy                  b      
  stmmaceth           rmii               P        q           |output        	  disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                             V              d        default            Q   R                    P            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2                X                                         M        kotg         host                                 ,            @                  S      	  usb2-phy            okay          usb@ff5c0000              generic-ehci                 \                                         N   F           T        usb         okay          usb@ff5d0000              generic-ohci                 ]                                         N   F           T        usb         okay          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3               `                        C                  `      a              kref_clk suspend_clk bus_clk         host          
  ;utmi_wide            D         e         }                                   okay                         +       device@2              usbbda,8153                      interrupt-controller@ff811000             arm,gic-400                                  	      @                                 @             `                       	                   pinctrl           rockchip,rk3328-pinctrl            :                     +            	   gpio0@ff210000            rockchip,gpio-bank               !                        3                                   *            	                      a      gpio1@ff220000            rockchip,gpio-bank               "                        4                                   *            	                      )      gpio2@ff230000            rockchip,gpio-bank               #                        5                                   *            	                      e      gpio3@ff240000            rockchip,gpio-bank               $                        6                                   *            	                 pcfg-pull-up             	           W      pcfg-pull-down           	,           _      pcfg-pull-none           	;           U      pcfg-pull-none-2ma           	;        	H              ^      pcfg-pull-up-2ma             	        	H         pcfg-pull-up-4ma             	        	H              X      pcfg-pull-none-4ma           	;        	H              [      pcfg-pull-down-4ma           	,        	H         pcfg-pull-none-8ma           	;        	H              Y      pcfg-pull-up-8ma             	        	H              Z      pcfg-pull-none-12ma          	;        	H              \      pcfg-pull-up-12ma            	        	H              ]      pcfg-output-high             	W      pcfg-output-low          	c      pcfg-input-high          	         	n           V      pcfg-input           	n      i2c0       i2c0-xfer            	{            U            U           '         i2c1       i2c1-xfer            	{            U            U           (         i2c2       i2c2-xfer            	{            U            U           ,         i2c3       i2c3-xfer            	{             U             U           -      i2c3-pins            	{              U              U         hdmi_i2c       hdmii2c-xfer             	{             U             U           A         pdm-0      pdmm0-clk           	{            U                 pdmm0-fsync         	{            U      pdmm0-sdi0          	{            U                 pdmm0-sdi1          	{            U                 pdmm0-sdi2          	{            U                 pdmm0-sdi3          	{            U                 pdmm0-clk-sleep         	{             V                 pdmm0-sdi0-sleep            	{             V                 pdmm0-sdi1-sleep            	{             V                 pdmm0-sdi2-sleep            	{             V                 pdmm0-sdi3-sleep            	{             V                 pdmm0-fsync-sleep           	{             V         tsadc      otp-pin         	{             U           8      otp-out         	{            U           9         uart0      uart0-xfer           	{      	      U            W                  uart0-cts           	{            U           !      uart0-rts           	{      
      U           "      uart0-rts-pin           	{      
       U         uart1      uart1-xfer           	{            U            W           #      uart1-cts           	{            U           $      uart1-rts           	{            U           %      uart1-rts-pin           	{             U         uart2-0    uart2m0-xfer             	{             U            W         uart2-1    uart2m1-xfer             	{             U            W           &         spi0-0     spi0m0-clk          	{            W      spi0m0-cs0          	{            W      spi0m0-tx           	{      	      W      spi0m0-rx           	{      
      W      spi0m0-cs1          	{            W         spi0-1     spi0m1-clk          	{            W      spi0m1-cs0          	{            W      spi0m1-tx           	{            W      spi0m1-rx           	{            W      spi0m1-cs1          	{            W         spi0-2     spi0m2-clk          	{             W           .      spi0m2-cs0          	{            W           1      spi0m2-tx           	{            W           /      spi0m2-rx           	{            W           0         i2s1       i2s1-mclk           	{            U      i2s1-sclk           	{            U      i2s1-lrckrx         	{            U      i2s1-lrcktx         	{            U      i2s1-sdi            	{            U      i2s1-sdo            	{            U      i2s1-sdio1          	{            U      i2s1-sdio2          	{            U      i2s1-sdio3          	{            U      i2s1-sleep          	{             V             V             V             V             V             V             V             V             V         i2s2-0     i2s2m0-mclk         	{            U      i2s2m0-sclk         	{            U      i2s2m0-lrckrx           	{            U      i2s2m0-lrcktx           	{            U      i2s2m0-sdi          	{            U      i2s2m0-sdo          	{            U      i2s2m0-sleep          `  	{             V             V             V             V             V             V         i2s2-1     i2s2m1-mclk         	{            U      i2s2m1-sclk         	{             U      i2sm1-lrckrx            	{            U      i2s2m1-lrcktx           	{            U      i2s2m1-sdi          	{            U      i2s2m1-sdo          	{            U      i2s2m1-sleep          P  	{             V              V             V             V             V         spdif-0    spdifm0-tx          	{             U         spdif-1    spdifm1-tx          	{            U         spdif-2    spdifm2-tx          	{             U                    sdmmc0-0       sdmmc0m0-pwren          	{            X      sdmmc0m0-pin            	{             X         sdmmc0-1       sdmmc0m1-pwren          	{             X      sdmmc0m1-pin            	{              X           g         sdmmc0     sdmmc0-clk          	{            Y           G      sdmmc0-cmd          	{            Z           H      sdmmc0-dectn            	{            X           I      sdmmc0-wrprt            	{            X      sdmmc0-bus1         	{             Z      sdmmc0-bus4       @  	{             Z            Z            Z            Z           J      sdmmc0-pins         	{             X             X             X             X             X             X             X              X         sdmmc0ext      sdmmc0ext-clk           	{            [      sdmmc0ext-cmd           	{             X      sdmmc0ext-wrprt         	{            X      sdmmc0ext-dectn         	{            X      sdmmc0ext-bus1          	{            X      sdmmc0ext-bus4        @  	{            X            X            X            X      sdmmc0ext-pins          	{              X             X             X             X             X             X             X             X         sdmmc1     sdmmc1-clk          	{            Y      sdmmc1-cmd          	{            Z      sdmmc1-pwren            	{            Z      sdmmc1-wrprt            	{            Z      sdmmc1-dectn            	{            Z      sdmmc1-bus1         	{            Z      sdmmc1-bus4       @  	{            Z            Z            Z            Z      sdmmc1-pins         	{             X             X             X             X             X             X             X             X             X         emmc       emmc-clk            	{            \      emmc-cmd            	{            ]      emmc-pwren          	{            U      emmc-rstnout            	{            U      emmc-bus1           	{             ]      emmc-bus4         @  	{             ]            ]            ]            ]      emmc-bus8           	{             ]            ]            ]            ]            ]            ]            ]            ]         pwm0       pwm0-pin            	{            U           2         pwm1       pwm1-pin            	{            U           3         pwm2       pwm2-pin            	{            U           4         pwmir      pwmir-pin           	{            U           5         gmac-1     rgmiim1-pins         `  	{            Y            [            [            Y            [            [            [      
      [            [            Y      	      Y            [            [            Y            Y             Y             Y             [             Y             Y             Y             Y           N      rmiim1-pins         	{            ^            \            ^            ^            ^            ^      
      ^            ^            \      	      \             U             U             U             U             U             U         gmac2phy       fephyled-speed10            	{             U      fephyled-duplex         	{             U      fephyled-rxm1           	{            U           Q      fephyled-txm1           	{            U      fephyled-linkm1         	{            U           R         tsadc_pin      tsadc-int           	{            U      tsadc-pin           	{             U         hdmi_pin       hdmi-cec            	{             U           @      hdmi-hpd            	{             _           B         cif-0      dvp-d2d9-m0         	{            U            U            U            U            U      	      U      
      U            U            U             U            U            U         cif-1      dvp-d2d9-m1         	{            U            U            U            U            U            U            U            U            U             U            U            U         button     reset-button-pin            	{               U           `         gmac2io    eth-phy-reset-pin           	{             _           O         leds       lan-led-pin         	{             U           b      sys-led-pin         	{              U           c      wan-led-pin         	{             U           d         lan    lan-vdd-pin         	{             U           h         pmic       pmic-int-l          	{             W           *         sd     sdio-vcc-pin            	{             W           f            chosen          	serial2:1500000n8         gmac-clock            fixed-clock         HsY@        Xgmac_clkin          ;               L      keys          
    gpio-keys              `        default    reset           	reset              a               	          	   2         leds          
    gpio-leds              b   c   d        default    led-0              e               	nanopi-r2s:green:lan          led-1              a               	nanopi-r2s:red:sys          	on        led-2              e               	nanopi-r2s:green:wan             sdmmcio-regulator             regulator-gpio           	           )                  f        default         vcc_io_sdio          $        J w@        b 2Z        	          	voltage         
            w@    2Z            
                    sdmmc-regulator           regulator-fixed         
   a                 g        default         vcc_sd           8        J 2Z        b 2Z        
              K      vdd-5v            regulator-fixed         vdd_5v           $         8        J LK@        b LK@           +      vdd-5v-lan            regulator-fixed          	        
   e                  h        default         vdd_5v_lan           $         8        
   +         	compatible interrupt-parent #address-cells #size-cells model serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 ethernet1 mmc0 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method next-level-cache operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 pmuio-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,grf rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity rockchip,efuse-size bits #io-channel-cells interrupt-names #iommu-cells iommus power-domains remote-endpoint phys phy-names nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-sd-highspeed disable-wp sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply snps,txpbl clock_in_out phy-handle phy-mode phy-supply rx_delay snps,aal tx_delay reset-assert-us reset-deassert-us reset-gpios phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path label linux,code debounce-interval default-state enable-active-high regulator-settling-time-us regulator-type startup-delay-us vin-supply gpio 