     8     (            	z  l                             ?    engicam,px30-core-ctouch2-of10 engicam,px30-core rockchip,px30                                   +         /   7Engicam PX30.Core C.TOUCH 2.0 10.1" Open Frame     aliases          =/ethernet@ff360000           G/i2c@ff180000            L/i2c@ff190000            Q/i2c@ff1a0000            V/i2c@ff1b0000            [/serial@ff030000             c/serial@ff158000             k/serial@ff160000             s/serial@ff168000             {/serial@ff170000             /serial@ff178000             /spi@ff1d0000            /spi@ff1d8000            /mmc@ff370000            /mmc@ff380000            /mmc@ff390000         cpus                         +       cpu@0            cpu           arm,cortex-a35                            psci                                                          Z                              !         cpu@1            cpu           arm,cortex-a35                           psci                                                          Z                              !         cpu@2            cpu           arm,cortex-a35                           psci                                                          Z                              !   	      cpu@3            cpu           arm,cortex-a35                           psci                                                          Z                              !   
      idle-states         )psci       cpu-sleep             arm,idle-state           6        G           ^   x        o                     !         cluster-sleep             arm,idle-state           6        G          ^          o                    !               cpu0-opp-table            operating-points-v2                  !      opp-600000000               #F          ~ ~ p          @               opp-816000000               0,            p          @      opp-1008000000              <            p          @      opp-1200000000              G              p          @      opp-1296000000              M?d          p p p          @         arm-pmu           arm,cortex-a35-pmu        0         d          e          f          g                    	   
      display-subsystem             rockchip,display-subsystem                        okay          external-gmac-clock           fixed-clock                 gmac_clkin                    psci              arm,psci-1.0             smc       timer             arm,armv8-timer       0                                
        thermal-zones      soc-thermal         (           >          L          ^          trips      trip-point-0            n p        z           passive       trip-point-1            n L        z           passive         !         soc-crit            n 8        z        	   critical             cooling-maps       map0                                           map1                                                 gpu-thermal         (   d        >          ^               xin24m            fixed-clock                     n6         xin24m          !   `      power-management@ff000000         $    rockchip,px30-pmu syscon simple-mfd                           power-controller              rockchip,px30-power-controller                                  +            !   b   power-domain@5                                       <                                power-domain@7                                   ;                             power-domain@9              	                     C      @      ?                             power-domain@10             
      @                                9      7      8      :                                      power-domain@11                                        K                                power-domain@12                   X                                                        D      5      6                                      power-domain@13                   (                                 3                     !   "                  power-domain@14                            I           #                        syscon@ff010000       '    rockchip,px30-pmugrf syscon simple-mfd                                             +           !      io-domains        $    rockchip,px30-pmu-io-voltage-domain         okay               $           $      reboot-mode           syscon-reboot-mode                     RB        RB	        RB        RB         RB         serial@ff030000       $    rockchip,px30-uart snps,dw-apb-uart                                                     %      %           (baudclk apb_pclk            4   &       &           9tx rx           C           M           Zdefault         h   '   (   )      	  disabled          i2s@ff070000          &    rockchip,px30-i2s rockchip,rk3066-i2s                                                                       (i2s_clk i2s_hclk            4   &      &           9tx rx           Zdefault         h   *   +   ,   -        r          	  disabled          i2s@ff080000          &    rockchip,px30-i2s rockchip,rk3066-i2s                                                                       (i2s_clk i2s_hclk            4   &      &           9tx rx           Zdefault         h   .   /   0   1        r          	  disabled          interrupt-controller@ff131000             arm,gic-400                                        @                                 @             `                       	          !         syscon@ff140000       $    rockchip,px30-grf syscon simple-mfd                                            +           !   4   io-domains             rockchip,px30-io-voltage-domain         okay               $           $           $           $           $           2      lvds              rockchip,px30-lvds             3        dphy               4        lvds            okay       ports                        +       port@0                                    +       endpoint@0                       )   5        !         endpoint@1                      )   6        !            port@1                 endpoint            )   7        !                     serial@ff158000       $    rockchip,px30-uart snps,dw-apb-uart                                                            I        (baudclk apb_pclk            4   &      &           9tx rx           C           M           Zdefault         h   8   9   :      	  disabled          serial@ff160000       $    rockchip,px30-uart snps,dw-apb-uart                                                             J        (baudclk apb_pclk            4   &      &           9tx rx           C           M           Zdefault         h   ;        okay          serial@ff168000       $    rockchip,px30-uart snps,dw-apb-uart                                                            K        (baudclk apb_pclk            4   &      &           9tx rx           C           M           Zdefault         h   <   =   >      	  disabled          serial@ff170000       $    rockchip,px30-uart snps,dw-apb-uart                                                             L        (baudclk apb_pclk            4   &      &   	        9tx rx           C           M           Zdefault         h   ?   @   A      	  disabled          serial@ff178000       $    rockchip,px30-uart snps,dw-apb-uart                                                            M        (baudclk apb_pclk            4   &   
   &           9tx rx           C           M           Zdefault         h   B   C   D      	  disabled          i2c@ff180000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             N      	  (i2c pclk                              Zdefault         h   E                     +            okay       pmic@20           rockchip,rk809                           F                      Zdefault         h   G         9         Z                   rk808-clkout1 rk808-clkout2         h   H        t   H           H           H           I           I           I           I           H   regulators     DCDC_REG1           vdd_log                           	 ~        ! p        9  q   regulator-state-mem          N        f ~         DCDC_REG2           vdd_arm                           	 ~        ! p        9  q        !      regulator-state-mem                  f ~         DCDC_REG3           vcc_ddr                      regulator-state-mem          N         DCDC_REG4           vcc_3v3                           	 2Z        ! 2Z        !   $   regulator-state-mem          N        f 2Z         DCDC_REG5           vcc3v3_sys                            	 2Z        ! 2Z        !   I   regulator-state-mem          N        f 2Z         LDO_REG1            vcc_1v0                           	 B@        ! B@   regulator-state-mem          N        f B@         LDO_REG2            vcc_1v8                           	 w@        ! w@        !   2   regulator-state-mem          N        f w@         LDO_REG3            vdd_1v0                           	 B@        ! B@   regulator-state-mem          N        f B@         LDO_REG4            vcc3v0_pmu                            	 2Z        ! 2Z   regulator-state-mem          N        f 2Z         LDO_REG5          	  vccio_sd                              	 w@        ! 2Z   regulator-state-mem          N        f 2Z         SWITCH_REG1                  vcc3v3_lcd          !         SWITCH_REG2         vcc5v0_host                                  i2c@ff190000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             O      	  (i2c pclk                              Zdefault         h   J                     +          	  disabled          i2c@ff1a0000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             P      	  (i2c pclk                   	           Zdefault         h   K                     +          	  disabled          i2c@ff1b0000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                              Q      	  (i2c pclk                   
           Zdefault         h   L                     +          	  disabled          spi@ff1d0000          &    rockchip,px30-spi rockchip,rk3066-spi                                                          $     U        (spiclk apb_pclk         4   &      &           9tx rx           Zdefault         h   M   N   O   P                     +          	  disabled          spi@ff1d8000          &    rockchip,px30-spi rockchip,rk3066-spi                                                         %     V        (spiclk apb_pclk         4   &      &           9tx rx           Zdefault         h   Q   R   S   T   U                     +          	  disabled          watchdog@ff1e0000             rockchip,px30-wdt snps,dw-wdt                                       [               %         	  disabled          pwm@ff200000          &    rockchip,px30-pwm rockchip,rk3328-pwm                                         "     S      	  (pwm pclk            Zdefault         h   V                   okay            !         pwm@ff200010          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        "     S      	  (pwm pclk            Zdefault         h   W                 	  disabled          pwm@ff200020          &    rockchip,px30-pwm rockchip,rk3328-pwm                                         "     S      	  (pwm pclk            Zdefault         h   X                 	  disabled          pwm@ff200030          &    rockchip,px30-pwm rockchip,rk3328-pwm                  0                      "     S      	  (pwm pclk            Zdefault         h   Y                 	  disabled          pwm@ff208000          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        #     T      	  (pwm pclk            Zdefault         h   Z                 	  disabled          pwm@ff208010          &    rockchip,px30-pwm rockchip,rk3328-pwm                                       #     T      	  (pwm pclk            Zdefault         h   [                 	  disabled          pwm@ff208020          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        #     T      	  (pwm pclk            Zdefault         h   \                 	  disabled          pwm@ff208030          &    rockchip,px30-pwm rockchip,rk3328-pwm                 0                      #     T      	  (pwm pclk            Zdefault         h   ]                 	  disabled          timer@ff210000        *    rockchip,px30-timer rockchip,rk3288-timer                !                                         Y      &        (pclk timer        dma-controller@ff240000           arm,pl330 arm,primecell              $        @                                                           	  (apb_pclk                       !   &      tsadc@ff280000            rockchip,px30-tsadc              (                        $                 ,          P               ,     X        (tsadc apb_pclk                      
  tsadc-apb              4                  Zinit default sleep          h   ^           _        !   ^        +           okay            A           X           !         saradc@ff288000       ,    rockchip,px30-saradc rockchip,rk3399-saradc              (                       T           s                  -     W        (saradc apb_pclk                       saradc-apb        	  disabled          nvmem@ff290000            rockchip,px30-otp                )        @                /     Z     a        (otp apb_pclk phy                          phy                      +      id@7                         cpu-leakage@17                       performance@1e                                        clock-controller@ff2b0000             rockchip,px30-cru                +                     `   %           (xin24m gpll            4                            8                                     @      I        Fq   рр          !         clock-controller@ff2bc000             rockchip,px30-pmucru                 +                    `        (xin24m             4                                 %      %      %           G          !   %      syscon@ff2c0000       ,    rockchip,px30-usb2phy-grf syscon simple-mfd              ,                              +      usb2phy@100           rockchip,px30-usb2phy                               %   
        (phyclk                                       a        usb480m_phy         okay            !   a   host-port                              D         
  linestate           okay            !   d      otg-port                      $         B          A          @           otg-bvalid otg-id linestate         okay            !   c            phy@ff2e0000              rockchip,px30-dsi-dphy               .                     %        E      	  (ref pclk                  >        apb                        b           okay            !   3      usb@ff300000          0    rockchip,px30-usb rockchip,rk3066-usb snps,dwc2              0                        >                         (otg         otg                                           @                  c      	  usb2-phy               b           okay          usb@ff340000              generic-ehci                 4                        <                            d        usb            b           okay          usb@ff350000              generic-ohci                 5                        =                            d        usb            b           okay          ethernet@ff360000             rockchip,px30-gmac               6                        +           macirq        @         >      ?      ?      @      A           C      L      [  (stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac clk_mac_speed             4        rmii            Zdefault         h   e   f           b   	              ^      
  stmmaceth           okay            output          %   $         0        F      P  P        [   g             mmc@ff370000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                7        @                6                         ;      C      D        (biu ciu ciu-drive ciu-sample            k           u           р        Zdefault         h   h   i   j   k           b           okay                                   $           $      mmc@ff380000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                8        @                7                         8      E      F        (biu ciu ciu-drive ciu-sample            k           u           р        Zdefault         h   l   m   n           b   
        okay                         +                                                  o                     wifi@1            brcm,bcm4329-fmac                        mmc@ff390000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                9        @                5                         9      G      H        (biu ciu ciu-drive ciu-sample            k           u           р        Zdefault         h   p   q   r           b   
        okay                      &               nand-controller@ff3b0000              rockchip,px30-nfc                ;        @                9                        7        (ahb nfc               7        р        Zdefault          h   s   t   u   v   w   x   y   z           b   
      	  disabled          opp-table2            operating-points-v2         !   {   opp-200000000                         ~      opp-300000000                               opp-400000000               ׄ                opp-480000000               8          *         gpu@ff400000          $    rockchip,px30-mali arm,mali-bifrost              @        @       $         /          .          -           job mmu gpu                I                       b              {      	  disabled            !         dsi@ff450000              rockchip,px30-mipi-dsi               E                        K                 D        (pclk               3        dphy               b                 =        apb            4                     +          	  disabled       ports                        +       port@0                                    +       endpoint@0                       )   |        !         endpoint@1                      )   }        !                  vop@ff460000              rockchip,px30-vop-big                F                       M                                      (aclk_vop dclk_vop hclk_vop                3      4      5        axi ahb dclk            5   ~           b           okay       port                         +            !      endpoint@0                       )           !   |      endpoint@1                      )           !   5            iommu@ff460f00            rockchip,iommu               F                       M                                (aclk iface             b           <            okay            !   ~      vop@ff470000              rockchip,px30-vop-lit                G                       N                                      (aclk_vop dclk_vop hclk_vop                7      8      9        axi ahb dclk            5              b           okay       port                         +            !      endpoint@0                       )           !   }      endpoint@1                      )           !   6            iommu@ff470f00            rockchip,iommu               G                       N                                (aclk iface             b           <            okay            !         qos@ff518000              rockchip,px30-qos syscon                 Q                 !         qos@ff520000              rockchip,px30-qos syscon                 R                  !   #      qos@ff52c000              rockchip,px30-qos syscon                 R                 !         qos@ff538000              rockchip,px30-qos syscon                 S                 !         qos@ff538080              rockchip,px30-qos syscon                 S                !         qos@ff538100              rockchip,px30-qos syscon                 S                 !         qos@ff538180              rockchip,px30-qos syscon                 S                !         qos@ff540000              rockchip,px30-qos syscon                 T                  !         qos@ff540080              rockchip,px30-qos syscon                 T                 !         qos@ff548000              rockchip,px30-qos syscon                 T                 !         qos@ff548080              rockchip,px30-qos syscon                 T                !         qos@ff548100              rockchip,px30-qos syscon                 T                 !          qos@ff548180              rockchip,px30-qos syscon                 T                !   !      qos@ff548200              rockchip,px30-qos syscon                 T                 !   "      qos@ff550000              rockchip,px30-qos syscon                 U                  !         qos@ff550080              rockchip,px30-qos syscon                 U                 !         qos@ff550100              rockchip,px30-qos syscon                 U                 !         qos@ff550180              rockchip,px30-qos syscon                 U                !         qos@ff558000              rockchip,px30-qos syscon                 U                 !         qos@ff558080              rockchip,px30-qos syscon                 U                !         pinctrl           rockchip,px30-pinctrl              4        I                        +            V   gpio0@ff040000            rockchip,gpio-bank                                                      %            ]        m                               !   F      gpio1@ff250000            rockchip,gpio-bank               %                                         \         ]        m                               !         gpio2@ff260000            rockchip,gpio-bank               &                                         ]         ]        m                               !   g      gpio3@ff270000            rockchip,gpio-bank               '                                         ^         ]        m                             pcfg-pull-up             y        !         pcfg-pull-down                 pcfg-pull-none                   !         pcfg-pull-none-2ma                            pcfg-pull-up-2ma             y                 pcfg-pull-up-4ma             y                   !         pcfg-pull-none-4ma                            pcfg-pull-down-4ma                            pcfg-pull-none-8ma                              !         pcfg-pull-up-8ma             y                   !         pcfg-pull-none-12ma                             !         pcfg-pull-up-12ma            y                   !         pcfg-pull-none-smt                            !         pcfg-output-high                   pcfg-output-low                pcfg-input-high          y                 !         pcfg-input                 i2c0       i2c0-xfer                                	              !   E         i2c1       i2c1-xfer                                              !   J         i2c2       i2c2-xfer                                            !   K         i2c3       i2c3-xfer                                            !   L         tsadc      tsadc-otp-pin                                 !   ^      tsadc-otp-out                                !   _         uart0      uart0-xfer                  
                           !   '      uart0-cts                                !   (      uart0-rts                                !   )         uart1      uart1-xfer                                           !   8      uart1-cts                               !   9      uart1-rts                               !   :         uart2-m0       uart2m0-xfer                                              uart2-m1       uart2m1-xfer                                             !   ;         uart3-m0       uart3m0-xfer                                             uart3m0-cts                            uart3m0-rts                               uart3-m1       uart3m1-xfer                                             !   <      uart3m1-cts                             !   =      uart3m1-rts                             !   >         uart4      uart4-xfer                                           !   ?      uart4-cts                               !   @      uart4-rts                               !   A         uart5      uart5-xfer                                           !   B      uart5-cts                               !   C      uart5-rts                               !   D         spi0       spi0-clk                                !   M      spi0-csn                                !   N      spi0-miso                               !   O      spi0-mosi                               !   P      spi0-clk-hs                           spi0-miso-hs                              spi0-mosi-hs                                 spi1       spi1-clk                                !   Q      spi1-csn0                 	              !   R      spi1-csn1                 
              !   S      spi1-miso                               !   T      spi1-mosi                               !   U      spi1-clk-hs                           spi1-miso-hs                              spi1-mosi-hs                                 pdm    pdm-clk0m0                            pdm-clk0m1                            pdm-clk1                              pdm-sdi0m0                            pdm-sdi0m1                            pdm-sdi1                              pdm-sdi2                              pdm-sdi3                              pdm-clk0m0-sleep                               pdm-clk0m1-sleep                               pdm-clk1-sleep                             pdm-sdi0m0-sleep                               pdm-sdi0m1-sleep                               pdm-sdi1-sleep                             pdm-sdi2-sleep                             pdm-sdi3-sleep                                i2s0       i2s0-8ch-mclk                             i2s0-8ch-sclktx                           i2s0-8ch-sclkrx                           i2s0-8ch-lrcktx                           i2s0-8ch-lrckrx                           i2s0-8ch-sdo0                             i2s0-8ch-sdo1                             i2s0-8ch-sdo2                             i2s0-8ch-sdo3                             i2s0-8ch-sdi0                             i2s0-8ch-sdi1                             i2s0-8ch-sdi2                 	            i2s0-8ch-sdi3                                i2s1       i2s1-2ch-mclk                             i2s1-2ch-sclk                               !   *      i2s1-2ch-lrck                               !   +      i2s1-2ch-sdi                                !   ,      i2s1-2ch-sdo                                !   -         i2s2       i2s2-2ch-mclk                             i2s2-2ch-sclk                               !   .      i2s2-2ch-lrck                               !   /      i2s2-2ch-sdi                                !   0      i2s2-2ch-sdo                                !   1         sdmmc      sdmmc-clk                               !   h      sdmmc-cmd                               !   i      sdmmc-det                                !   j      sdmmc-bus1                            sdmmc-bus4        @                                                          !   k         sdio       sdio-clk                                !   n      sdio-cmd                                !   m      sdio-bus4         @                                                          !   l         emmc       emmc-clk                  	              !   p      emmc-cmd                  
              !   q      emmc-rstnout                              emmc-bus1                              emmc-bus4         @                                                         emmc-bus8                                                                                                                    !   r         flash      flash-cs0                               !   v      flash-rdy                 	              !   x      flash-dqs                 
              !   z      flash-ale                               !   s      flash-cle                               !   u      flash-wrn                               !   y      flash-csl                             flash-rdn                               !   w      flash-bus8                                                                                                                   !   t         lcdc       lcdc-rgb-dclk-pin                              lcdc-rgb-m0-hsync-pin                             lcdc-rgb-m0-vsync-pin                             lcdc-rgb-m0-den-pin                           lcdc-rgb888-m0-data-pins                                                                             
            	                                                                                                                                                                                                                        lcdc-rgb666-m0-data-pins                                                                              
            	                                                                                                                                                lcdc-rgb565-m0-data-pins                                                                              
            	                                                                                                                        lcdc-rgb888-m1-data-pins                                                     
                                                                                                                                                                        lcdc-rgb666-m1-data-pins                                                      
                                                                                                lcdc-rgb565-m1-data-pins                                                      
                                                                           pwm0       pwm0-pin                                 !   V         pwm1       pwm1-pin                                 !   W         pwm2       pwm2-pin                                !   X         pwm3       pwm3-pin                                 !   Y         pwm4       pwm4-pin                                !   Z         pwm5       pwm5-pin                                !   [         pwm6       pwm6-pin                                !   \         pwm7       pwm7-pin                                !   ]         gmac       rmii-pins                                                                                                                  	              !   e      mac-refclk-12ma               
              !   f      mac-refclk                
               cif-m0     cif-clkout-m0                             dvp-d2d9-m0                                                                                                                            	            
                        dvp-d0d1-m0                                        d10-d11-m0                                            cif-m1     cif-clkout-m1                             dvp-d2d9-m1                                                               	                                                                                                dvp-d0d1-m1                                        d10-d11-m1                                            isp    isp-prelight                                 bt     bt-enable-h                              !            sdio-pwrseq    wifi-enable-h                                !            pmic       pmic_int                                  !   G            vcc5v0-sys            regulator-fixed         vcc5v0_sys                            	 LK@        ! LK@        !   H      sdio-pwrseq           mmc-pwrseq-simple                     
  (ext_clock              P        Zdefault         h           	                 !   o      vcc3v3-btreg              regulator-gpio           	        Zdefault         h           btreg-gpio-supply           	 2Z        ! 2Z                   2Z            	.                vcc3v3-rf-aux-mod             regulator-fixed         vcc3v3_rf_aux_mod           	 2Z        ! 2Z                          	:   H      xin32k            fixed-clock                                xin32k          !         backlight             pwm-backlight           	E         a            !         chosen          	Jserial2:115200n8          panel             ampire,am-1280800n3tzqw-t00h            	V           	`           	mvesa-24    port       endpoint            )           !   7               	compatible interrupt-parent #address-cells #size-cells model ethernet0 i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 serial3 serial4 serial5 spi0 spi1 mmc1 mmc2 mmc0 device_type reg enable-method clocks #cooling-cells cpu-idle-states dynamic-power-coefficient operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity ports status clock-frequency clock-output-names #clock-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution #power-domain-cells pm_qos pmuio1-supply pmuio2-supply offset mode-bootloader mode-fastboot mode-loader mode-normal mode-recovery clock-names dmas dma-names reg-shift reg-io-width pinctrl-names pinctrl-0 #sound-dai-cells #interrupt-cells interrupt-controller vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply phys phy-names rockchip,grf rockchip,output remote-endpoint rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt regulator-off-in-suspend #pwm-cells arm,pl330-periph-burst #dma-cells assigned-clocks assigned-clock-rates resets reset-names rockchip,hw-tshut-temp pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells bits #reset-cells assigned-clock-parents #phy-cells interrupt-names power-domains dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy-mode clock_in_out phy-supply snps,reset-active-low snps,reset-delays-us snps,reset-gpio bus-width fifo-depth max-frequency cap-sd-highspeed card-detect-delay vmmc-supply vqmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable sd-uhs-sdr104 cap-mmc-highspeed mmc-hs200-1_8v iommus #iommu-cells rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low input-enable rockchip,pins post-power-on-delay-ms reset-gpios enable-active-high enable-gpio vin-supply pwms stdout-path backlight power-supply data-mapping 