     8     (            
  \                                  rockchip,px30-evb rockchip,px30                                  +            7Rockchip PX30 EVB      aliases          =/ethernet@ff360000           G/i2c@ff180000            L/i2c@ff190000            Q/i2c@ff1a0000            V/i2c@ff1b0000            [/serial@ff030000             c/serial@ff158000             k/serial@ff160000             s/serial@ff168000             {/serial@ff170000             /serial@ff178000             /spi@ff1d0000            /spi@ff1d8000            /mmc@ff370000            /mmc@ff380000            /mmc@ff390000         cpus                         +       cpu@0            cpu           arm,cortex-a35                            psci                                                          Z                              !         cpu@1            cpu           arm,cortex-a35                           psci                                                          Z                              !         cpu@2            cpu           arm,cortex-a35                           psci                                                          Z                              !   	      cpu@3            cpu           arm,cortex-a35                           psci                                                          Z                              !   
      idle-states         )psci       cpu-sleep             arm,idle-state           6        G           ^   x        o                     !         cluster-sleep             arm,idle-state           6        G          ^          o                    !               cpu0-opp-table            operating-points-v2                  !      opp-600000000               #F          ~ ~ p          @               opp-816000000               0,            p          @      opp-1008000000              <            p          @      opp-1200000000              G              p          @      opp-1296000000              M?d          p p p          @         arm-pmu           arm,cortex-a35-pmu        0         d          e          f          g                    	   
      display-subsystem             rockchip,display-subsystem                        okay          external-gmac-clock           fixed-clock                 gmac_clkin                    psci              arm,psci-1.0             smc       timer             arm,armv8-timer       0                                
        thermal-zones      soc-thermal         (           >          L          ^          trips      trip-point-0            n p        z           passive       trip-point-1            n L        z           passive         !         soc-crit            n 8        z        	   critical             cooling-maps       map0                                           map1                                                 gpu-thermal         (   d        >          ^               xin24m            fixed-clock                     n6         xin24m          !   a      power-management@ff000000         $    rockchip,px30-pmu syscon simple-mfd                           power-controller              rockchip,px30-power-controller                                  +            !   c   power-domain@5                                       <                                power-domain@7                                   ;                             power-domain@9              	                     C      @      ?                             power-domain@10             
      @                                9      7      8      :                                      power-domain@11                                        K                                power-domain@12                   X                                                        D      5      6                                      power-domain@13                   (                                 3                     !   "                  power-domain@14                            I           #                        syscon@ff010000       '    rockchip,px30-pmugrf syscon simple-mfd                                             +           !      io-domains        $    rockchip,px30-pmu-io-voltage-domain         okay               $           $      reboot-mode           syscon-reboot-mode                     RB        RB	        RB        RB         RB         serial@ff030000       $    rockchip,px30-uart snps,dw-apb-uart                                                     %      %           (baudclk apb_pclk            4   &       &           9tx rx           C           M           Zdefault         h   '   (   )      	  disabled          i2s@ff070000          &    rockchip,px30-i2s rockchip,rk3066-i2s                                                                       (i2s_clk i2s_hclk            4   &      &           9tx rx           Zdefault         h   *   +   ,   -        r            okay          i2s@ff080000          &    rockchip,px30-i2s rockchip,rk3066-i2s                                                                       (i2s_clk i2s_hclk            4   &      &           9tx rx           Zdefault         h   .   /   0   1        r          	  disabled          interrupt-controller@ff131000             arm,gic-400                                        @                                 @             `                       	          !         syscon@ff140000       $    rockchip,px30-grf syscon simple-mfd                                            +           !   6   io-domains             rockchip,px30-io-voltage-domain         okay               2           3           4           $           4           2      lvds              rockchip,px30-lvds             5        dphy               6        lvds          	  disabled       ports                        +       port@0                                    +       endpoint@0                       )   7        !         endpoint@1                      )   8        !                     serial@ff158000       $    rockchip,px30-uart snps,dw-apb-uart                                                            I        (baudclk apb_pclk            4   &      &           9tx rx           C           M           Zdefault         h   9   :        okay          serial@ff160000       $    rockchip,px30-uart snps,dw-apb-uart                                                             J        (baudclk apb_pclk            4   &      &           9tx rx           C           M           Zdefault         h   ;      	  disabled          serial@ff168000       $    rockchip,px30-uart snps,dw-apb-uart                                                            K        (baudclk apb_pclk            4   &      &           9tx rx           C           M           Zdefault         h   <   =   >      	  disabled          serial@ff170000       $    rockchip,px30-uart snps,dw-apb-uart                                                             L        (baudclk apb_pclk            4   &      &   	        9tx rx           C           M           Zdefault         h   ?   @   A      	  disabled          serial@ff178000       $    rockchip,px30-uart snps,dw-apb-uart                                                            M        (baudclk apb_pclk            4   &   
   &           9tx rx           C           M           Zdefault         h   B   C   D        okay          i2c@ff180000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             N      	  (i2c pclk                              Zdefault         h   E                     +            okay       pmic@20           rockchip,rk809                           F                      Zdefault         h   G         9         Z                    xin32k          h   H        t   H           H           H           I           I           I           I           H   regulators     DCDC_REG1           vdd_log          ~         p          q         (         <        !      regulator-state-mem          N        f ~         DCDC_REG2           vdd_arm          ~         p          q         (         <        !      regulator-state-mem                  f ~         DCDC_REG3           vcc_ddr          (         <   regulator-state-mem          N         DCDC_REG4           vcc_3v0          -         -         (         <        !   4   regulator-state-mem          N        f -         DCDC_REG5           vcc3v3_sys           2Z         2Z         (         <        !   I   regulator-state-mem          N        f 2Z         LDO_REG1            vcc_1v0          B@         B@         (         <   regulator-state-mem          N        f B@         LDO_REG2            vcc_1v8          w@         w@         (         <        !   2   regulator-state-mem          N        f w@         LDO_REG3            vdd_1v0          B@         B@         (         <   regulator-state-mem          N        f B@         LDO_REG4            vcc3v0_pmu           -         -         (         <        !   $   regulator-state-mem          N        f -         LDO_REG5          	  vccio_sd             w@         2Z         (         <        !   3   regulator-state-mem          N        f 2Z         LDO_REG6            vcc_sd           2Z         2Z         <        !   m   regulator-state-mem          N        f 2Z         LDO_REG7            vcc2v8_dvp           *         *         <   regulator-state-mem                  f *         LDO_REG8            vcc1v8_dvp           w@         w@         <   regulator-state-mem          N        f w@         LDO_REG9            vcc1v5_dvp           `         `         <   regulator-state-mem                  f `         SWITCH_REG1         vcc3v3_lcd           <        !   K      SWITCH_REG2         vcc5v0_host          (         <               i2c@ff190000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             O      	  (i2c pclk                              Zdefault         h   J                     +            okay       sensor@d              asahi-kasei,ak8963                         F                  $        1 0 0 0 1 0 0 0 1         touchscreen@14            goodix,gt1151                           F                         F                 F                  K      sensor@4c             fsl,mma7660             L            F                       i2c@ff1a0000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             P      	  (i2c pclk                   	           Zdefault         h   L                     +          	  disabled          i2c@ff1b0000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                              Q      	  (i2c pclk                   
           Zdefault         h   M                     +          	  disabled          spi@ff1d0000          &    rockchip,px30-spi rockchip,rk3066-spi                                                          $     U        (spiclk apb_pclk         4   &      &           9tx rx           Zdefault         h   N   O   P   Q                     +          	  disabled          spi@ff1d8000          &    rockchip,px30-spi rockchip,rk3066-spi                                                         %     V        (spiclk apb_pclk         4   &      &           9tx rx           Zdefault         h   R   S   T   U   V                     +          	  disabled          watchdog@ff1e0000             rockchip,px30-wdt snps,dw-wdt                                       [               %         	  disabled          pwm@ff200000          &    rockchip,px30-pwm rockchip,rk3328-pwm                                         "     S      	  (pwm pclk            Zdefault         h   W                 	  disabled          pwm@ff200010          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        "     S      	  (pwm pclk            Zdefault         h   X                   okay            !         pwm@ff200020          &    rockchip,px30-pwm rockchip,rk3328-pwm                                         "     S      	  (pwm pclk            Zdefault         h   Y                 	  disabled          pwm@ff200030          &    rockchip,px30-pwm rockchip,rk3328-pwm                  0                      "     S      	  (pwm pclk            Zdefault         h   Z                 	  disabled          pwm@ff208000          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        #     T      	  (pwm pclk            Zdefault         h   [                 	  disabled          pwm@ff208010          &    rockchip,px30-pwm rockchip,rk3328-pwm                                       #     T      	  (pwm pclk            Zdefault         h   \                 	  disabled          pwm@ff208020          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        #     T      	  (pwm pclk            Zdefault         h   ]                 	  disabled          pwm@ff208030          &    rockchip,px30-pwm rockchip,rk3328-pwm                 0                      #     T      	  (pwm pclk            Zdefault         h   ^                 	  disabled          timer@ff210000        *    rockchip,px30-timer rockchip,rk3288-timer                !                                         Y      &        (pclk timer        dma-controller@ff240000           arm,pl330 arm,primecell              $        @                                                           	  (apb_pclk                       !   &      tsadc@ff280000            rockchip,px30-tsadc              (                        $           	      ,          P               ,     X        (tsadc apb_pclk          .            
  5tsadc-apb              6        A         Zinit default sleep          h   _        X   `        b   _        l           okay                                  !         saradc@ff288000       ,    rockchip,px30-saradc rockchip,rk3399-saradc              (                       T                             -     W        (saradc apb_pclk         .              5saradc-apb          okay               2        !         nvmem@ff290000            rockchip,px30-otp                )        @                /     Z     a        (otp apb_pclk phy            .              5phy                      +      id@7                         cpu-leakage@17                       performance@1e                                        clock-controller@ff2b0000             rockchip,px30-cru                +                     a   %           (xin24m gpll            6                            8  	                                   @      I        Fq   рр          !         clock-controller@ff2bc000             rockchip,px30-pmucru                 +                    a        (xin24m             6                              	   %      %      %           G          !   %      syscon@ff2c0000       ,    rockchip,px30-usb2phy-grf syscon simple-mfd              ,                              +      usb2phy@100           rockchip,px30-usb2phy                               %   
        (phyclk                      	                 b        usb480m_phy         okay            !   b   host-port                              D         
  linestate           okay            !   e      otg-port                      $         B          A          @           otg-bvalid otg-id linestate         okay            !   d            phy@ff2e0000              rockchip,px30-dsi-dphy               .                     %        E      	  (ref pclk            .      >        5apb                        c           okay            !   5      usb@ff300000          0    rockchip,px30-usb rockchip,rk3066-usb snps,dwc2              0                        >                         (otg         $otg         ,           >          M            @                  d      	  usb2-phy               c           okay          usb@ff340000              generic-ehci                 4                        <                            e        usb            c           okay          usb@ff350000              generic-ohci                 5                        =                            e        usb            c           okay          ethernet@ff360000             rockchip,px30-gmac               6                        +           macirq        @         >      ?      ?      @      A           C      L      [  (stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac clk_mac_speed             6        \rmii            Zdefault         h   f   g           c   	        .      ^      
  5stmmaceth           okay            eoutput          r   4        }   h                             P  P      mmc@ff370000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                7        @                6                         ;      C      D        (biu ciu ciu-drive ciu-sample                                  р        Zdefault         h   i   j   k   l           c           okay                                                            *         7        E   m        Q   3      mmc@ff380000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                8        @                7                         8      E      F        (biu ciu ciu-drive ciu-sample                                  р        Zdefault         h   n   o   p           c   
        okay                      ^         t           q         7      mmc@ff390000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                9        @                5                         9      G      H        (biu ciu ciu-drive ciu-sample                                  р        Zdefault         h   r   s   t           c   
        okay                               t           u        E   4        Q   2      nand-controller@ff3b0000              rockchip,px30-nfc                ;        @                9                        7        (ahb nfc         	      7        р        Zdefault          h   v   w   x   y   z   {   |   }           c   
      	  disabled          opp-table2            operating-points-v2         !   ~   opp-200000000                         ~      opp-300000000                               opp-400000000               ׄ                opp-480000000               8          *         gpu@ff400000          $    rockchip,px30-mali arm,mali-bifrost              @        @       $         /          .          -           job mmu gpu                I                       c              ~        okay                       !         dsi@ff450000              rockchip,px30-mipi-dsi               E                        K                 D        (pclk               5        dphy               c           .      =        5apb            6                     +            okay       ports                        +       port@0                                    +       endpoint@0                       )           !         endpoint@1                      )           !            port@1                 endpoint            )           !               panel@0           xinpeng,xpp055c272                                     2           K   port       endpoint            )           !                  vop@ff460000              rockchip,px30-vop-big                F                       M                                      (aclk_vop dclk_vop hclk_vop          .      3      4      5        5axi ahb dclk                          c           okay       port                         +            !      endpoint@0                       )           !         endpoint@1                      )           !   7            iommu@ff460f00            rockchip,iommu               F                       M                                (aclk iface             c                       okay            !         vop@ff470000              rockchip,px30-vop-lit                G                       N                                      (aclk_vop dclk_vop hclk_vop          .      7      8      9        5axi ahb dclk                          c           okay       port                         +            !      endpoint@0                       )           !         endpoint@1                      )           !   8            iommu@ff470f00            rockchip,iommu               G                       N                                (aclk iface             c                       okay            !         qos@ff518000              rockchip,px30-qos syscon                 Q                 !         qos@ff520000              rockchip,px30-qos syscon                 R                  !   #      qos@ff52c000              rockchip,px30-qos syscon                 R                 !         qos@ff538000              rockchip,px30-qos syscon                 S                 !         qos@ff538080              rockchip,px30-qos syscon                 S                !         qos@ff538100              rockchip,px30-qos syscon                 S                 !         qos@ff538180              rockchip,px30-qos syscon                 S                !         qos@ff540000              rockchip,px30-qos syscon                 T                  !         qos@ff540080              rockchip,px30-qos syscon                 T                 !         qos@ff548000              rockchip,px30-qos syscon                 T                 !         qos@ff548080              rockchip,px30-qos syscon                 T                !         qos@ff548100              rockchip,px30-qos syscon                 T                 !          qos@ff548180              rockchip,px30-qos syscon                 T                !   !      qos@ff548200              rockchip,px30-qos syscon                 T                 !   "      qos@ff550000              rockchip,px30-qos syscon                 U                  !         qos@ff550080              rockchip,px30-qos syscon                 U                 !         qos@ff550100              rockchip,px30-qos syscon                 U                 !         qos@ff550180              rockchip,px30-qos syscon                 U                !         qos@ff558000              rockchip,px30-qos syscon                 U                 !         qos@ff558080              rockchip,px30-qos syscon                 U                !         pinctrl           rockchip,px30-pinctrl              6                                +               gpio0@ff040000            rockchip,gpio-bank                                                      %                    	                               !   F      gpio1@ff250000            rockchip,gpio-bank               %                                         \                 	                               !         gpio2@ff260000            rockchip,gpio-bank               &                                         ]                 	                               !   h      gpio3@ff270000            rockchip,gpio-bank               '                                         ^                 	                             pcfg-pull-up             	        !         pcfg-pull-down           	        !         pcfg-pull-none           	*        !         pcfg-pull-none-2ma           	*        	7         pcfg-pull-up-2ma             	        	7         pcfg-pull-up-4ma             	        	7           !         pcfg-pull-none-4ma           	*        	7         pcfg-pull-down-4ma           	        	7         pcfg-pull-none-8ma           	*        	7           !         pcfg-pull-up-8ma             	        	7           !         pcfg-pull-none-12ma          	*        	7           !         pcfg-pull-up-12ma            	        	7           !         pcfg-pull-none-smt           	*         	F        !         pcfg-output-high             	[      pcfg-output-low          	g        !         pcfg-input-high          	         	r        !         pcfg-input           	r      i2c0       i2c0-xfer            	                    	              !   E         i2c1       i2c1-xfer            	                                  !   J         i2c2       i2c2-xfer            	                                !   L         i2c3       i2c3-xfer            	                                !   M         tsadc      tsadc-otp-pin           	                      !   _      tsadc-otp-out           	                     !   `         uart0      uart0-xfer           	       
                           !   '      uart0-cts           	                     !   (      uart0-rts           	                     !   )         uart1      uart1-xfer           	                                !   9      uart1-cts           	                    !   :      uart1-rts           	                     uart2-m0       uart2m0-xfer             	                                !   ;         uart2-m1       uart2m1-xfer             	                                 uart3-m0       uart3m0-xfer             	                                uart3m0-cts         	                   uart3m0-rts         	                      uart3-m1       uart3m1-xfer             	                                !   <      uart3m1-cts         	                    !   =      uart3m1-rts         	                    !   >         uart4      uart4-xfer           	                                !   ?      uart4-cts           	                    !   @      uart4-rts           	                    !   A         uart5      uart5-xfer           	                                !   B      uart5-cts           	                    !   C      uart5-rts           	                    !   D         spi0       spi0-clk            	                    !   N      spi0-csn            	                    !   O      spi0-miso           	                    !   P      spi0-mosi           	                    !   Q      spi0-clk-hs         	                  spi0-miso-hs            	                  spi0-mosi-hs            	                     spi1       spi1-clk            	                    !   R      spi1-csn0           	      	              !   S      spi1-csn1           	      
              !   T      spi1-miso           	                    !   U      spi1-mosi           	                    !   V      spi1-clk-hs         	                  spi1-miso-hs            	                  spi1-mosi-hs            	                     pdm    pdm-clk0m0          	                  pdm-clk0m1          	                  pdm-clk1            	                  pdm-sdi0m0          	                  pdm-sdi0m1          	                  pdm-sdi1            	                  pdm-sdi2            	                  pdm-sdi3            	                  pdm-clk0m0-sleep            	                   pdm-clk0m1-sleep            	                   pdm-clk1-sleep          	                   pdm-sdi0m0-sleep            	                   pdm-sdi0m1-sleep            	                   pdm-sdi1-sleep          	                   pdm-sdi2-sleep          	                   pdm-sdi3-sleep          	                      i2s0       i2s0-8ch-mclk           	                  i2s0-8ch-sclktx         	                  i2s0-8ch-sclkrx         	                  i2s0-8ch-lrcktx         	                  i2s0-8ch-lrckrx         	                  i2s0-8ch-sdo0           	                  i2s0-8ch-sdo1           	                  i2s0-8ch-sdo2           	                  i2s0-8ch-sdo3           	                  i2s0-8ch-sdi0           	                  i2s0-8ch-sdi1           	                  i2s0-8ch-sdi2           	      	            i2s0-8ch-sdi3           	                     i2s1       i2s1-2ch-mclk           	                  i2s1-2ch-sclk           	                    !   *      i2s1-2ch-lrck           	                    !   +      i2s1-2ch-sdi            	                    !   ,      i2s1-2ch-sdo            	                    !   -         i2s2       i2s2-2ch-mclk           	                  i2s2-2ch-sclk           	                    !   .      i2s2-2ch-lrck           	                    !   /      i2s2-2ch-sdi            	                    !   0      i2s2-2ch-sdo            	                    !   1         sdmmc      sdmmc-clk           	                    !   i      sdmmc-cmd           	                    !   j      sdmmc-det           	                     !   k      sdmmc-bus1          	                  sdmmc-bus4        @  	                                                        !   l         sdio       sdio-clk            	                    !   p      sdio-cmd            	                    !   o      sdio-bus4         @  	                                                        !   n         emmc       emmc-clk            	      	              !   r      emmc-cmd            	      
              !   s      emmc-rstnout            	                  emmc-bus1           	                   emmc-bus4         @  	                                                       emmc-bus8           	                                                                                                         !   t      emmc-reset          	                     !            flash      flash-cs0           	                    !   y      flash-rdy           	      	              !   {      flash-dqs           	      
              !   }      flash-ale           	                    !   v      flash-cle           	                    !   x      flash-wrn           	                    !   |      flash-csl           	                  flash-rdn           	                    !   z      flash-bus8          	                                                                                                         !   w         lcdc       lcdc-rgb-dclk-pin           	                   lcdc-rgb-m0-hsync-pin           	                  lcdc-rgb-m0-vsync-pin           	                  lcdc-rgb-m0-den-pin         	                  lcdc-rgb888-m0-data-pins           	                                                                  
            	                                                                                                                                                                                                                        lcdc-rgb666-m0-data-pins            	                                                                  
            	                                                                                                                                                lcdc-rgb565-m0-data-pins            	                                                                  
            	                                                                                                                        lcdc-rgb888-m1-data-pins           	                                          
                                                                                                                                                                        lcdc-rgb666-m1-data-pins            	                                          
                                                                                                lcdc-rgb565-m1-data-pins            	                                          
                                                                           pwm0       pwm0-pin            	                     !   W         pwm1       pwm1-pin            	                     !   X         pwm2       pwm2-pin            	                    !   Y         pwm3       pwm3-pin            	                     !   Z         pwm4       pwm4-pin            	                    !   [         pwm5       pwm5-pin            	                    !   \         pwm6       pwm6-pin            	                    !   ]         pwm7       pwm7-pin            	                    !   ^         gmac       rmii-pins           	                                                                                                       	              !   f      mac-refclk-12ma         	      
              !   g      mac-refclk          	      
               cif-m0     cif-clkout-m0           	                  dvp-d2d9-m0         	                                                                                                                   	            
                        dvp-d0d1-m0          	                              d10-d11-m0           	                                 cif-m1     cif-clkout-m1           	                  dvp-d2d9-m1         	                                                      	                                                                                                dvp-d0d1-m1          	                              d10-d11-m1           	                                 isp    isp-prelight            	                     headphone      hp-det          	                      pmic       pmic_int            	                      !   G      soc_slppin_gpio         	                    soc_slppin_slp          	                   soc_slppin_rst          	                      sdio-pwrseq    wifi-enable-h           	                      !               chosen          	serial5:115200n8          adc-keys          	    adc-keys            	              	buttons         	 w@        	   d   esc-key         	esc         	           	 0      home-key            	home            	   f        	 	      menu-key            	menu            	           	 x      vol-down-key            	volume down         	   r        	       vol-up-key        
  	volume up           	   s        	  Bh         backlight             pwm-backlight           
	         a            
   K        !         emmc-pwrseq           mmc-pwrseq-emmc         h           Zdefault                           !   u      sdio-pwrseq           mmc-pwrseq-simple           Zdefault         h              F              !   q      vccsys            regulator-fixed         vcc5v0_sys           (         <         LK@         LK@        !   H         	compatible interrupt-parent #address-cells #size-cells model ethernet0 i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 serial3 serial4 serial5 spi0 spi1 mmc0 mmc1 mmc2 device_type reg enable-method clocks #cooling-cells cpu-idle-states dynamic-power-coefficient operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity ports status clock-frequency clock-output-names #clock-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution #power-domain-cells pm_qos pmuio1-supply pmuio2-supply offset mode-bootloader mode-fastboot mode-loader mode-normal mode-recovery clock-names dmas dma-names reg-shift reg-io-width pinctrl-names pinctrl-0 #sound-dai-cells #interrupt-cells interrupt-controller vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply phys phy-names rockchip,grf rockchip,output remote-endpoint rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt regulator-off-in-suspend gpios vdd-supply mount-matrix irq-gpios reset-gpios VDDIO-supply #pwm-cells arm,pl330-periph-burst #dma-cells assigned-clocks assigned-clock-rates resets reset-names rockchip,hw-tshut-temp pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply bits #reset-cells assigned-clock-parents #phy-cells interrupt-names power-domains dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy-mode clock_in_out phy-supply snps,reset-gpio snps,reset-active-low snps,reset-delays-us bus-width fifo-depth max-frequency cap-mmc-highspeed cap-sd-highspeed card-detect-delay sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply keep-power-in-suspend non-removable mmc-pwrseq mmc-hs200-1_8v mali-supply backlight iovcc-supply vci-supply iommus #iommu-cells rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low input-enable rockchip,pins stdout-path io-channels io-channel-names keyup-threshold-microvolt poll-interval label linux,code press-threshold-microvolt pwms power-supply 