  Co   8  >   (              >                                                                      ,Huawei Nexus 6P          2huawei,angler qcom,msm8994           =               I  	  
                 V  Z       chosen           dserial0:115200n8          clocks     xo-board             2fixed-clock          p             }$       	   xo_board                      sleep-clk            2fixed-clock          p             }         
   sleep_clk            cpus                                 cpu@0            cpu          2arm,cortex-a53                            psci                               l2-cache             2cache                                    cpu@1            cpu          2arm,cortex-a53                           psci                                  cpu@2            cpu          2arm,cortex-a53                           psci                                  cpu@3            cpu          2arm,cortex-a53                           psci                                  cpu@100          cpu          2arm,cortex-a57                           psci                               l2-cache             2cache                                    cpu@101          cpu          2arm,cortex-a57                          psci                            	      cpu@102          cpu          2arm,cortex-a57                          psci                            
      cpu@103          cpu          2arm,cortex-a57                          psci                                  cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1               	      core2               
      core3                              firmware       scm          2qcom,scm-msm8994 qcom,scm            memory@80000000          memory                                hwlock           2qcom,tcsr-mutex                                                  pmu          2arm,cortex-a53-pmu                         psci             2arm,psci-0.2             hvc       reserved-memory                                      dfps_data_mem@3400000                @                        smem_region@6a00000                                                   memory@7000000                                       memory@ca00000                                      memory@c6400000          2qcom,rmtfs-mem               @                                   memory@c6700000              p                        memory@c7000000                                       memory@c9400000              @                          smd       	   2qcom,smd       rpm                            $                  -           ;            J      rpm-requests             2qcom,rpm-msm8994            Zrpm_requests       rpmcc            2qcom,rpmcc-msm8994           p         power-controller             2qcom,msm8994-rpmpd          l                 opp-table            2operating-points-v2                opp1                     opp2                     opp3                     opp4                     opp5                     opp6                                    smem          
   2qcom,smem                                             smp2p-lpass          2qcom,smp2p                                         $         
        ;            J      master-kernel           master-kernel                    slave-kernel            slave-kernel                                 smp2p-modem          2qcom,smp2p                                                      $                 ;            J      master-kernel           master-kernel                    slave-kernel            slave-kernel                                 soc                                                       2simple-bus     interrupt-controller@f9000000            2qcom,msm-qgic2                                                             mailbox@f900d000          %   2qcom,msm8994-apcs-kpss-global syscon                                                timer@f9020000                                             2arm,armv7-timer-mem                  frame@f9021000          (                    	                                     frame@f9023000          (                   
            0          	  5disabled          frame@f9024000          (                               @          	  5disabled          frame@f9025000          (                               P          	  5disabled          frame@f9026000          (                               `          	  5disabled          frame@f9027000          (                               p          	  5disabled          frame@f9028000          (                                         	  5disabled             usb@f92f8800             2qcom,msm8996-dwc3 qcom,dwc3          /                                               <      r      m            s      "  Ccore iface sleep mock_utmi ref xo           O      s      r        _$ '         t                  usb@f9200000          
   2snps,dwc3                                                               high-speed          peripheral           sdhci@f9824900           2qcom,sdhci-msm-v4            I   @            hc_mem core_mem                 {                     hc_irq pwr_irq          <      h      v           Ccore iface xo            default sleep                                                   "            ,      	  5disabled          sdhci@f98a4900           2qcom,sdhci-msm-v4            I   @            hc_mem core_mem                 }                     hc_irq pwr_irq          <      i                 Ccore iface xo            default sleep                                      !        :   "   d            "         	  5disabled          dma-controller@f9904000          2qcom,bam-v1.7.0          @                              <      :        Cbam_clk         C           N             V        o           |               %      serial@f991e000       %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm                                 l           Ccore iface          <      H      :         default sleep              #           $        5okay          i2c@f9923000             2qcom,i2c-qup-v2.2.1          0                    _           <      :      ;        Ciface core           }            %      %           tx rx            default sleep              &           '                                	  5disabled          spi@f9923000             2qcom,spi-qup-v2.2.1          0                    _           <      <      :        Ccore iface          $            %      %           tx rx            default sleep              (           )                                	  5disabled          i2c@f9924000             2qcom,i2c-qup-v2.2.1          @                    `           <      :      =        Ciface core           }            %      %           tx rx            default sleep              *           +                                	  5disabled          i2c@f9926000             2qcom,i2c-qup-v2.2.1          `                    b           <      :      A        Ciface core           }            %      %           tx rx            default sleep              ,           -                                	  5disabled          i2c@f9927000             2qcom,i2c-qup-v2.2.1          p                    c           <      :      C        Ciface core           }            .      .           tx rx            default sleep              /           0                                	  5disabled          i2c@f9928000             2qcom,i2c-qup-v2.2.1                              d           <      :      E        Ciface core           }            %      %           tx rx            default sleep              1           2                                	  5disabled          dma-controller@f9944000          2qcom,bam-v1.7.0          @                              <      M        Cbam_clk         C           N             V        o           |               .      serial@f995e000       %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm                                 r           Ccore iface          <      [      M           .      .           tx rx            default sleep              3           4      	  5disabled          i2c@f9963000             2qcom,i2c-qup-v2.2.1          0                    e           <      M      N        Ciface core           }            .      .           tx rx            default sleep              5           6                                	  5disabled          spi@f9966000             2qcom,spi-qup-v2.2.1          `                    h           <      U      M        Ccore iface          $            .      .           tx rx            default sleep              7           8                                	  5disabled          i2c@f9967000             2qcom,i2c-qup-v2.2.1          p                    i           <      M      V        Ciface core           } j           .      .           tx rx            default sleep              9           :                                	  5disabled          clock-controller@fc400000            2qcom,gcc-msm8994             p                      l            @                        sram@fc428000            2qcom,rpm-msg-ram             B   @                   restart@fc4ab000             2qcom,pshold          J          spmi@fc4c0000            2qcom,spmi-pmic-arb           L    L    L            core intr cnfg          periph_irq                             N                                                                    syscon@fd484000          2syscon           H@                       pinctrl@fd510000             2qcom,msm8994-pinctrl             Q    @                                        "                                                     U               "   blsp1-uart2-default         blsp_uart2          
gpio4 gpio5                                 #      blsp1-uart2-sleep           gpio            
gpio4 gpio5                     +            $      blsp2-uart2-default         blsp_uart8          
gpio45 gpio46 gpio47 gpio48                                 3      blsp2-uart2-sleep           gpio            
gpio45 gpio46 gpio47 gpio48                                 4      i2c1-default          
  blsp_i2c1           
gpio2 gpio3                                 &      i2c1-sleep          gpio            
gpio2 gpio3                                 '      i2c2-default          
  blsp_i2c2           
gpio6 gpio7                                 *      i2c2-sleep          gpio            
gpio6 gpio7                                 +      i2c4-default          
  blsp_i2c4           
gpio19 gpio20                                   ,      i2c4-sleep          gpio            
gpio19 gpio20                       +         :            -      i2c5-default          
  blsp_i2c5           
gpio23 gpio24                                   /      i2c5-sleep          gpio            
gpio23 gpio24                                   0      i2c6-default          
  blsp_i2c6           
gpio28 gpio27                                   1      i2c6-sleep          gpio            
gpio28 gpio27                                   2      i2c7-default          
  blsp_i2c7           
gpio44 gpio43                                   5      i2c7-sleep          gpio            
gpio44 gpio43                                   6      blsp2-spi10-default             7   default         blsp_spi10          
gpio53 gpio54 gpio55               
         +      cs          gpio            
gpio55                               blsp2-spi10-sleep           
gpio53 gpio54 gpio55                                    8      i2c11-default           blsp_i2c11          
gpio83 gpio84                                   9      i2c11-sleep         gpio            
gpio83 gpio84                                   :      blsp1-spi1-default              (   default       
  blsp_spi1           
gpio0 gpio1 gpio3              
         +      cs          gpio            
gpio8                                blsp1-spi1-sleep            
gpio0 gpio1 gpio3                                   )      clk-on        	  
sdc1_clk                                          clk-off       	  
sdc1_clk                                          cmd-on        	  
sdc1_cmd             G                             cmd-off       	  
sdc1_cmd             G                             data-on       
  
sdc1_data            G                             data-off          
  
sdc1_data            G                             rclk-on       
  
sdc1_rclk            +                  rclk-off          
  
sdc1_rclk            +                  sdc2-clk-on       	  
sdc2_clk                        
                  sdc2-clk-off          	  
sdc2_clk                                          sdc2-cmd-on       	  
sdc2_cmd             G           
                  sdc2-cmd-off          	  
sdc2_cmd             G                              sdc2-data-on          
  
sdc2_data            G           
                  sdc2-data-off         
  
sdc2_data            G                       !            timer            2arm,armv8-timer       0                                         vph-pwr-regulator            2regulator-fixed         Tvph_pwr         c 6        { 6               aliases         /soc/serial@f991e000             	interrupt-parent #address-cells #size-cells model compatible qcom,msm-id qcom,pmic-id qcom,board-id stdout-path #clock-cells clock-frequency clock-output-names phandle device_type reg enable-method next-level-cache cache-level cpu syscon #hwlock-cells interrupts ranges no-map qcom,client-id qcom,ipc qcom,smd-edge qcom,local-pid qcom,remote-pid qcom,smd-channels #power-domain-cells operating-points-v2 opp-level memory-region qcom,rpm-msg-ram hwlocks qcom,smem qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells #mbox-cells frame-number status clocks clock-names assigned-clocks assigned-clock-rates power-domains qcom,select-utmi-as-pipe-clk snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk maximum-speed dr_mode reg-names interrupt-names pinctrl-names pinctrl-0 pinctrl-1 bus-width non-removable cd-gpios #dma-cells qcom,ee qcom,controlled-remotely num-channels qcom,num-ees dmas dma-names spi-max-frequency #reset-cells qcom,channel gpio-controller gpio-ranges #gpio-cells gpio-reserved-ranges function pins drive-strength bias-disable bias-pull-down input-enable bias-pull-up regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on serial0 